An RAM detection method based on a March algorithm

Abstract

The invention discloses an RAM (random access memory) detection method based on a March algorithm, which comprises the following steps of powering on an MCU (microprogrammed control unit) to completesystem initialization and external equipment parameter configuration; enabling the system to enter and judge whether ROM detection and RAM detection are passed or not; if not, powering down the MCU; if yes, configuring Bq76930 chip information and protection parameters, and configuring the external equipment parameter information; reading the information of the two Bq76930 chips, and judging whether the information exceeds a set error value or not; if so, closing the MOS tube or fusing the FUSE; if not, resetting the watchdog counter, and carrying out other detection; if the detection is abnormal, closing the MOS tube or fusing the FUSE; and if the detection is normal, starting the MCU to output a flag bit to complete the detection. According to the invention, the March algorithm is adopted to carry out the RAM detection, the fault coverage rate is higher, the time complexity is smaller, the hardware cost is low, the fault rate of data storage is reduced, the continuous address errorsor interference errors can be checked, the test efficiency is improved, and the accuracy, consistency and integrity of data are ensured.

Description

technical field [0001] The invention relates to the technical field of RAM detection, in particular to a March algorithm-based RAM detection method. Background technique [0002] System-on-Chip (SOC) technology is the mainstream technology of VLSI that has developed rapidly since the beginning of the 21st century. With the continuous increase of integrated circuit design scale, the design of embedding a large amount of memory in the system chip SoC The method is becoming more and more important. In the prior art, the detection of RAM generally has the problems of high failure rate, many continuous address errors and interference errors, and low test efficiency. At the same time, the detection time is relatively long , the hardware overhead is relatively large, and the accuracy rate is not high. Therefore, the existing technology needs to be improved. Contents of the invention [0003] The technical problem to be solved by the embodiments of the present invention is to pro...

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Problems solved by technology

[0002] System-on-Chip (SOC) technology is the mainstream technology of VLSI that has developed rapidly since the beginning of the 21st century. With the continuous increase of integrated circuit design scale, the design of embedding a large amount of memory in the system chip SoC The method is becoming more and more important. In the prior art, there are generally problems of high failure rate, continuous address errors and interference errors, and low test efficiency in RAM detection. At the same time, the detection time is relatively long. , the hardware overhead is relatively high, and the accuracy rate is not high. Therefore, the existing technology needs to be improved

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