Differential clock signal testing system and method

Abstract

The invention discloses a differential clock signal testing system and method. An analog-to-digital converter is used for converting analog signals of a group of differential clock signal lines into first digital voltage value and a second digital voltage value; a pull-up resistor and a programmable logic component are allowed to control the electric potentials and voltages of the differential clock signal lines, so that the programmable logic component reads the first voltage value and the second voltage value; and under the condition that one of the first voltage value and the second voltagevalue is the same as a voltage value of a voltage end point or is zero volt or both are low potentials, corresponding information is generated to serve as a testing result. The testing system and method is used for achieving the technical effect of improving the convenience of testing the connection states of the differential clock signal lines.

Description

technical field [0001] The invention relates to a test system and its method, in particular to the test system and its method which can be applied to the test environment of boundary scan and used to test the differential clock signal of the line connection state. Background technique [0002] In recent years, with the popularization and vigorous development of electronic circuits, in order to achieve high-speed, low-noise, long-distance and high-accuracy transmission, it is usually realized by differential signal transmission technology. At the same time, high-speed circuit systems The clock signal is basically a differential clock (Differential Clock) signal. [0003] Generally speaking, the way to test differential signals and differential clock signals is to use the method of Function Test (FunctionTest), for example: use a chip that can capture 100MHz differential clock signals, and use self-developed firmware to detect 100MHz differential clock signals . However, thi...

AI Technical Summary

Problems solved by technology

However, this method not only has high development costs, but also cannot perform fault detection on single-ended signals, so it is inconvenient to test the connection status of differential clock signal lines.

[0004] In view of this, some manufacturers have proposed the technical means of boundary testing to test differential signals. However, although this method can test differential signals, it cannot test differential clock signals without changing the hardware architecture.

In other words, in the standard for boundary testing: "IEEE 1149.6", only differential signals are supported but differential clock signals are not supported

Therefore, it is still impossible to effectively solve the problem of inconvenient testing of the connection state of the differential clock signal line

[0005] To sum up, it can be seen that in the prior art, there has been a problem of inconvenient testing of the connection status of the differential clock signal line for a long time, so it is necessary to propose improved technical means to solve this problem

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