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Transceiver and Clock Generation Blocks

A transceiver and receiver technology, applied in the direction of generating/distributing signals, instruments, synchronous transmitters, etc., can solve the problems of multi-phase storage clock signal changes, performance and data accuracy degradation, and phase relationship accuracy cannot be guaranteed.

Active Publication Date: 2021-01-26
MEDIATEK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The accuracy of the phase relationship cannot be guaranteed due to the different trace lengths of the phase signals supplied to the data / strobe receive / transmit paths
In addition, in the actual operating environment, changes in process, voltage, and temperature (PVT) will cause changes in multi-phase storage clock signals
[0004] In other words, the relationship between the phase of the data signal (DQ) and the phase of the strobe signal (DQS) may be distorted, which degrades performance and data accuracy

Method used

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  • Transceiver and Clock Generation Blocks
  • Transceiver and Clock Generation Blocks
  • Transceiver and Clock Generation Blocks

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Embodiment Construction

[0030] The following description is a preferred embodiment of the present invention, which is only used to illustrate the technical features of the present invention, but not to limit the scope of the present invention. While certain terms are used throughout the specification and claims to refer to specific elements, those skilled in the art should understand that manufacturers may use different names for the same element. Therefore, the specification and claims do not use the difference in name as the way to distinguish components, but use the difference in function of the components as the basis for the difference. The terms "element", "system" and "apparatus" used in the present invention may be a computer-related entity, where the computer may be hardware, software, or a combination of hardware and software. The terms "comprising" and "including" mentioned in the following description and claims are open terms, so they should be interpreted as "including, but not limited ...

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Abstract

The present invention provides a transceiver and a clock generating module. Transceivers include receiver and clock generation blocks. The receiver receives the receive input data and the receive input strobe signal. The receiver includes a data receiving circuit for delay receiving the input data and a gate receiving circuit for delay receiving the input gate signal. The clock generation module includes a calibration circuit, a phase compensation module and a multi-phase signal generator. The phase compensation module compensates one of the compensation signals in the data receiving circuit and the gate receiving circuit according to the data phase compensation signal and the gate phase compensation signal generated by the calibration circuit. A multi-phase signal generator generates a phase-shifted system clock signal. A phase difference between the first phase-shifted system clock signal and the second phase-shifted system clock signal is equal to a phase difference between the receive path data and the receive path strobe signal. With the present invention, the phase of the signal associated with the receiver can be adjusted in real time.

Description

technical field [0001] The present application relates generally to transceivers and clock generation modules, and more particularly, to transceivers and clock generation modules capable of adaptively calibrating the phase of a signal. Background technique [0002] Data strobe encoding (data strobe encoding) is an encoding scheme used in digital circuits for sending / receiving data, for example, double data rate (double data rate, DDR) synchronous dynamic random access memory (synchronous dynamic random access memory, SDRAM). Data strobe encoding involves two signals, the data signal (DQ) and the strobe signal (DQS). In short, the strobe signal (DQS) is used to synchronize the data signal (DQ) while maintaining the phase difference between the strobe signal (DQS) and the data signal (DQ). [0003] Both the data signal (DQ) and the strobe signal (DQS) are clock-based signals, and the different phases of the data strobe code depend on multi-phase memory-clock signals (multi-p...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C7/10G11C7/22
CPCG11C7/1006G11C7/222G06F1/04G11C7/1066G11C7/1093G11C11/4076G11C11/4093G11C29/023G11C29/028G11C2207/107G11C2207/2254H04L7/0041H04L7/0091H04L7/0331H04L7/042H04L7/06
Inventor 徐瑛佑庄志伦郭柏均
Owner MEDIATEK INC