Array substrate, manufacturing method thereof, and display device
A technology for array substrates and manufacturing methods, applied in the fields of array substrates and their manufacture, and display devices, capable of solving problems such as large differences in threshold voltages and circuit failures
Active Publication Date: 2021-10-12
BOE TECH GRP CO LTD
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Problems solved by technology
The array substrate of the present disclosure compensates for the difference in threshold voltage caused by the difference in the channel width-to-length ratio of different thin film transistors by adjusting the carrier mobility or carrier concentration of thin film transistors in different regions, thereby solving the problem caused by different regions of thin film transistors. Circuit failure problems caused by large differences in transistor threshold voltage
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[0027] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present disclosure. Apparently, the described embodiments are some of the embodiments of the present disclosure, not all of them. Based on the described embodiments of the present disclosure, all other embodiments obtained by persons of ordinary skill in the art without creative effort fall within the protection scope of the present disclosure.
[0028] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure shall have the usual meanings understood by those skilled in the art to which the present disclosure belongs. "First", "second" and similar words used in the present disclosure do not indicate any order, quantity or importan...
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An array substrate, a manufacturing method thereof, and a display device. The manufacturing method of the array substrate includes: forming a first thin film transistor and a second thin film transistor in the first area and the second area of the base substrate, the first thin film transistor includes a first active layer, and the second thin film transistor includes a second active layer. The source layer, forming the first active layer and the second active layer includes: synchronously forming a semiconductor layer in the first region and the second region; performing a treatment process on the semiconductor layer in at least one of the first region and the second region so that the carrier mobility of the first active layer is greater than the carrier mobility of the second active layer, and / or, the carrier concentration of the first active layer is greater than that of the second active layer concentration. The array substrate manufactured by the array substrate manufacturing method of the present disclosure can compensate the difference in threshold voltage caused by the difference in channel width-to-length ratio of different thin film transistors by adjusting the carrier mobility or concentration of thin film transistors in different regions.
Description
technical field [0001] At least one embodiment of the present disclosure relates to an array substrate, a manufacturing method thereof, and a display device. Background technique [0002] Low Temperature Poly-Silicon (LTPS) has higher electron mobility and stability than amorphous silicon, and the electron mobility of low-temperature poly-silicon can be dozens or even hundreds of times that of amorphous silicon. Therefore, the technology of forming thin film transistors using low-temperature polysilicon materials has been rapidly developed. Contents of the invention [0003] At least one embodiment of the present disclosure provides an array substrate, a manufacturing method thereof, and a display device. The array substrate of the present disclosure compensates for the difference in threshold voltage caused by the difference in the channel width-to-length ratio of different thin film transistors by adjusting the carrier mobility or carrier concentration of thin film tran...
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IPC IPC(8): H01L27/12H01L29/786H01L21/84
CPCH01L27/127H01L27/1222H01L29/78696H01L29/78672H01L27/1229H01L27/1237H01L27/1218H01L29/6675
Inventor 刘利宾杨倩
Owner BOE TECH GRP CO LTD