Latch based on magnetic skyrmion, trigger and control method

Abstract

The invention belongs to the technical field of digital circuits. The invention discloses a latch based on magnetic skyrmion, a trigger and a control method. The latch based on the magnetic skyrmion is of a double-layer structure composed of a heavy metal HM layer and a ferromagnetic FM layer, wherein magnetic skyrmion is preset in the ferromagnetic layer, when voltage is not applied to the enabling end E E=0, the position of the magnetic skyrmion in the ferromagnetic layer is controlled by applying voltage to the input end D, and when voltage is applied to the enabling end E E=1, the positionof the magnetic skyrmion in the ferromagnetic layer does not change along with the state of the input end D; in the invention, two latches based on the magnetic skyrmion are cascaded to form the trigger. According to the invention, the occupied area of the latch is greatly reduced, the circuit design is simplified, and the latch can be used for a time sequence logic circuit with higher density; the magnetic memory has non-volatility, so that the static power consumption of the latch and the trigger is greatly reduced.

Description

technical field [0001] The invention belongs to the technical field of digital circuits, in particular to a magnetic skyrmion-based latch and flip-flop and a control method. Background technique [0002] Currently, the closest prior art: [0003] Latches and flip-flops are important storage elements in sequential logic circuits. Traditional latches and flip-flops are built from CMOS logic gates. [0004] The problem that prior art exists is: [0005] (1) Traditional CMOS latches and flip-flops are constructed of multiple CMOS logic gates, which require the use of a large number of transistors, resulting in a relatively large area. [0006] (2) The stored information of the CMOS latch and flip-flop is volatile, that is, the data is lost after the power is turned off, and the prior art needs to keep the power on all the time, resulting in relatively large static power consumption. [0007] The difficulty of solving the above technical problems: [0008] The above-mentione...

AI Technical Summary

Problems solved by technology

[0005] (1) Traditional CMOS latches and flip-flops are built from multiple CMOS logic gates, requiring a large number of transistors, resulting in a large area

[0006] (2) The stored information of CMOS latches and flip-flops is volatile, that is, the data is lost after the power is turned off, and the existing technology needs to keep the power on at all times, resulting in large static power consumption

[0008] The above technical problems are inherent in CMOS technology, and it is difficult to completely solve them at present

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