A kind of manufacturing method of ldmos device

Abstract

The invention provides a method for manufacturing an LDMOS device, forming an N-type buried layer and a P-type epitaxial layer in a P-type substrate; forming a field oxygen region on the silicon surface, and then forming an N well and a P well, and the field oxygen region is located in the N well The middle surface area; the gate is formed on the silicon surface between the N well and the P well, the gate overlaps the P well longitudinally, and there is a gap between the gate and the N well longitudinally; the gap is formed at the surface of the P-type substrate N-type LDD region; N-type heavily doped region is formed in the surface region of P well and N well, and P-type heavily doped region is formed in the surface region of P well; Contact holes are formed on the gate and field oxygen regions, and the The contact hole is connected to the metal line. The present invention does not require an additional mask, and using the existing process flow, the breakdown voltage BV can reach more than 20V; a certain distance is left between the field oxygen region STI and the polysilicon poly, so that the NLDD can be self-aligned and implanted; the drift region is composed of NW and NLDD Composition: Contact holes are drilled on the STI to achieve the effect of a field plate, which simplifies the process and improves production capacity.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a manufacturing method of an LDMOS device. Background technique [0002] High-voltage LDMOS is often used in high-voltage power integrated circuits to meet the requirements of high-voltage resistance and power control. LDMOS devices are widely used because they are easily compatible with CMOS processes. Usually, the breakdown voltage BV requires less than 14V for LDMOS, and the drift region can share the N-well NW; but because the implant dose of the N-well NW is relatively thick and difficult to deplete, devices with a BV requirement greater than 14V need to add an additional layer of mask as the LDMOS alone drift zone. [0003] figure 1 It is an LDMOS structure in the prior art, the polysilicon poly field plate straddles the shallow trench isolation region STI, and the drift region is defined by a separate mask mask. Among them, 1-NBL is an n-type buried layer, 2-...

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Problems solved by technology

[0005] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a method for manufacturing an LDMOS device, which is used to solve the problem of adding an additional layer of mask to the device in the prior art that requires a breakdown voltage greater than 14V as the drift of the LDMOS alone. Areas lead to cumbersome and complicated processes

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