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ldmos device and its manufacturing method

A manufacturing method and device technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as difficult photolithography process, lower product yield, blurred alignment marks, etc., to improve alignment efficiency, Effect of improving performance and improving alignment accuracy

Active Publication Date: 2020-06-16
WUHAN XINXIN SEMICON MFG CO LTD
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Problems solved by technology

[0003] However, in the etching process of some thicker (such as 40K) metal layers of LDMOS, such as aluminum pad (AL PAD), a very thick photoresist (PR) or other film layers are required as a mask (MASK), The alignment mark (mark) is very blurred, which poses great challenges and difficulties to the photolithography process, and at the same time causes a large decrease in product yield

Method used

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  • ldmos device and its manufacturing method
  • ldmos device and its manufacturing method

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Embodiment Construction

[0037] Figure 1~5 It is a structural schematic diagram of each step of a manufacturing method of an LDMOS device. Please refer to Figure 1 to Figure 5 As shown, the fabrication method of the LDMOS device is as follows.

[0038] First, please refer to figure 1 As shown, a substrate 10 is provided, an oxide layer 14 is formed on the substrate 10, a plurality of shallow trench isolation structures 15 are formed in the oxide layer 14 and the substrate 10, and the shallow trench The upper surface of the isolation structure 15 is higher than the upper surface of the oxide layer 14 . A P well 11 and an N well 12 are formed in the substrate 10 by ion implantation. A gate 16 is formed on the oxide layer 14, a source region 13 and a drain region 13' are formed in the substrate 10 on both sides of the gate 16, and the source region 13 and the drain region 13' are both Located in the P well 11 , and the source region 13 and the drain region 13 ′ are located below the upper surface ...

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Abstract

The present invention provides an LDMOS device and a manufacturing method thereof. The method includes: providing a substrate, forming an LDMOS transistor, a metal interconnection structure, and a top dielectric layer on the substrate, forming a plurality of first grooves in the In the top dielectric layer, a top metal material layer is formed on the top dielectric layer, the top metal material layer fills the first groove and forms a second groove, and the second groove is connected to the first groove. The projections of a groove on the substrate are overlapped, and the top metal material layer is patterned with the second groove as an alignment mark to form a top metal layer, and the second groove is used as an alignment mark. The alignment mark improves the alignment accuracy when patterning the top metal material layer, thereby improving the alignment efficiency, improving the performance of the LDMOS device, and improving the product yield.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to an LDMOS device and a manufacturing method thereof. Background technique [0002] The power field effect transistor mainly includes two types: a vertical double-diffused field effect transistor (VDMOS, Vertical Double-Diffused MOSFET) and a lateral double-diffused field effect transistor (LDMOS, Lateral Double-Diffused MOSFET). Among them, compared with the vertical double diffused field effect transistor (VDMOS), the lateral double diffused field effect transistor (LDMOS) has many advantages, for example, the latter has better thermal stability and frequency stability, higher gain and durability stability, lower feedback capacitance and thermal resistance, as well as constant input impedance and simpler bias current circuitry. [0003] However, in the etching process of some thicker (such as 40K) metal layers of LDMOS, such as aluminum pad (AL PAD), a very t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/78
CPCH01L29/66681H01L29/7816
Inventor 吴聪谢岩
Owner WUHAN XINXIN SEMICON MFG CO LTD
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