Hardware abstraction layer message forwarding method based on cache dynamic allocation

Abstract

The invention discloses a hardware abstraction layer message forwarding method based on cache dynamic allocation, which not only can avoid hardware abstraction layer message coverage based on an SRIObus transmission condition, but also can improve the universalization degree of a hardware abstraction layer and enhance the expandability of a hardware platform. The invention discloses a hardware abstraction layer message forwarding method based on cache dynamic allocation. The method comprises the following steps of (10) initializing an LD-PD table, (20) initializing a PD table, (30) sending anMHAL message, (40) retrieving the LD-PD table, (50) retrieving the PD table, and (60) forwarding the MHAL message.

Description

technical field [0001] The invention belongs to the technical field of wireless communication, in particular to a hardware abstraction layer message forwarding method based on cache dynamic allocation with high degree of generalization and strong scalability. Background technique [0002] Software Communication Architecture (Software Communication Architecture, SCA) has been widely used as an important architecture in the field of software radio. In order to improve the portability of waveform components, SCA Hardware Abstract Layer (Modem Hardware Abstract Layer, MHAL, hereinafter referred to as " Hardware Abstraction Layer") standard is proposed. The hardware abstraction layer is the middle layer software that shields the communication details of the underlying hardware and provides standard interfaces for the upper layer. The waveform component can realize data interaction between components by calling the hardware abstraction standard interface. Two addresses are define...

AI Technical Summary

Problems solved by technology

For future waveform applications, the deployment of waveform components and the communication relationship between waveform components are currently unpredictable, so it is impossible to determine which processors are used as receiving processors and reserve DMA buffer space, and it is also impossible to determine which processors processor as a transmit processor

Therefore, according to the current method, once a new waveform application is deployed to the platform, the hardware abstraction layer developer needs to re-allocate the DMA buffer space and recompile according to the communication relationship between the processor and the waveform component to which the waveform component is deployed. The hardware abstraction layer software of the involved processor not only increases the workload but also leads to the instability of the hardware abstraction layer software version. With the rapid development of software radio applications and the increasingly abundant waveform applications, people hope that the hardware abstraction layer The degree of generalization is higher, and it can carry more types of waveform applications without modifying the hardware abstraction layer software;

[0007] 2) Increase the difficulty of adjusting the DMA cache space, so once a processor on the hardware platform wants to adjust the location of its DMA cache space in memory (for example, a new waveform application needs to use the memory occupied by the DMA cache space time), the developer needs to find all the processors on the hardware platform that send SRIO data to the DMA cache space and modify the corresponding DMA cache start address inside the hardware abstraction layer software. The above operation is a cumbersome and error-prone process. process, once an error occurs, it will add a lot of workload to the subsequent waveform component debugging and troubleshooting;

[0008] 3) The scalability of the hardware platform is weakened. With the development of chip technology, the hardware platform also needs to be continuously upgraded. A scientific and reasonable hardware platform should be open and support the integration of hardware modules developed by third parties into the hardware platform.

Then the processor newly integrated into the hardware platform must communicate with the original processor, which requires the hardware abstraction layer developer of the original processor and the hardware abstraction layer developer of the new processor according to the layout of the waveform components and the data between components The interactive relationship negotiates the allocation of DMA cache space together, and compiles the negotiated DMA cache space address into the hardware abstraction layer software. The above expansion process involves a large number of developers and a high degree of coupling between processors. One move the whole body", which greatly increases the difficulty and workload of hardware platform expansion

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