Method for accessing FPGA storage unit based on AXI-ST interface, equipment and medium

Abstract

The invention discloses a method and device for accessing an FPGA storage unit based on an AXI-ST interface, equipment and a storage medium, and the method comprises the following steps: starting a slave mode of the AXI-ST interface to receive a read-write operation frame sent by a CPU, analyzing the read-write operation frame, and generating a control signal based on an analysis result; judging whether the control signal is a read request signal or not; in response to the fact that the control signal is a read request signal, reading data of the FPGA storage unit based on the AXI-MM interface; and forming a read response frame of the AXI-ST interface based on the data, and starting a master mode of the AXI-ST interface to send the read response frame to the CPU. According to the method for accessing the FPGA storage unit based on the AXI-ST interface, the equipment and the medium, the read-write instruction of the AXI-MM interface is packaged in the frame of the AXI-ST interface for transmission, and control can be achieved without interface conversion.

Description

technical field [0001] The present invention relates to the interface field, and more specifically refers to a method, device and readable medium for accessing FPGA storage units based on the AXI-ST interface. Background technique [0002] In the SOC (system-on-chip) design scenario of FPGA (Field Programmable Gate Array, Field Programmable Gate Array), the embedded CPU and its peripheral devices generally use the AXI bus as the bus interface of the device or IP. We refer to the AXI bus for memory mapping as the AXI-MM bus, and the AXI bus for streaming data as the AXI-ST bus. The memory used inside the FPGA or the memory interface controlled by it generally adopts the AXI-MM interface form, but when designing the system, due to the special needs of the main peripherals or for the purpose of simplifying the system bus design, only AXI-ST is selected as the system The primary bus, when the storage unit is connected to the CPU system, it will face the problem of interface con...

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