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Method for accessing FPGA storage unit based on AXI-ST interface, equipment and medium

A technology of AXI-ST and storage unit, applied in the field of interface, can solve problems such as inconvenience, achieve the effect of small protocol overhead, simplify the process of interface conversion and control, and simplify the definition

Active Publication Date: 2020-05-12
SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in some cases, it is not convenient to use the above two conversion modules

Method used

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  • Method for accessing FPGA storage unit based on AXI-ST interface, equipment and medium
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  • Method for accessing FPGA storage unit based on AXI-ST interface, equipment and medium

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Embodiment Construction

[0020] In order to make the object, technical solution and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0021] It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are to distinguish two entities with the same name but different parameters or parameters that are not the same, see "first" and "second" It is only for the convenience of expression, and should not be construed as a limitation on the embodiments of the present invention, which will not be described one by one in the subsequent embodiments.

[0022] Based on the above purpose, the first aspect of the embodiments of the present invention proposes an embodiment of a method for accessing FPGA storage units based on an AXI-ST interface. figure 1 Shown is a schematic diagram of an embodiment ...

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Abstract

The invention discloses a method and device for accessing an FPGA storage unit based on an AXI-ST interface, equipment and a storage medium, and the method comprises the following steps: starting a slave mode of the AXI-ST interface to receive a read-write operation frame sent by a CPU, analyzing the read-write operation frame, and generating a control signal based on an analysis result; judging whether the control signal is a read request signal or not; in response to the fact that the control signal is a read request signal, reading data of the FPGA storage unit based on the AXI-MM interface; and forming a read response frame of the AXI-ST interface based on the data, and starting a master mode of the AXI-ST interface to send the read response frame to the CPU. According to the method for accessing the FPGA storage unit based on the AXI-ST interface, the equipment and the medium, the read-write instruction of the AXI-MM interface is packaged in the frame of the AXI-ST interface for transmission, and control can be achieved without interface conversion.

Description

technical field [0001] The present invention relates to the interface field, and more specifically refers to a method, device and readable medium for accessing FPGA storage units based on the AXI-ST interface. Background technique [0002] In the SOC (system-on-chip) design scenario of FPGA (Field Programmable Gate Array, Field Programmable Gate Array), the embedded CPU and its peripheral devices generally use the AXI bus as the bus interface of the device or IP. We refer to the AXI bus for memory mapping as the AXI-MM bus, and the AXI bus for streaming data as the AXI-ST bus. The memory used inside the FPGA or the memory interface controlled by it generally adopts the AXI-MM interface form, but when designing the system, due to the special needs of the main peripherals or for the purpose of simplifying the system bus design, only AXI-ST is selected as the system The primary bus, when the storage unit is connected to the CPU system, it will face the problem of interface con...

Claims

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Application Information

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IPC IPC(8): G06F13/10G06F13/16
CPCG06F13/102G06F13/1668
Inventor 郭巍郝锐梅国强
Owner SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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