Method and system for predicting load instruction execution delay

An instruction execution and instruction technology, applied in the field of predicting the execution delay of Load instructions, can solve problems such as low accuracy, performance degradation, power consumption, etc., to improve accuracy, reduce pauses and refreshes, and avoid power consumption and performance. falling effect

Active Publication Date: 2022-04-26
SPREADTRUM COMM (SHANGHAI) CO LTD
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Problems solved by technology

Then the follow-up instructions that are dependent on it can calculate the earliest launch time based on this, but the accuracy of this prediction method is not high, and it will bring more pipeline Stall (pause) and Flush (refresh), resulting in unnecessary work. loss and performance degradation

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  • Method and system for predicting load instruction execution delay
  • Method and system for predicting load instruction execution delay
  • Method and system for predicting load instruction execution delay

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[0035] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is only some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0036] According to the ARMv8-A architecture, when the MMU (Memory Management Unit, memory management unit) is OFF or the Data Cache (data cache) is OFF, all Data Memory (data memory) accesses should be peripheral access or non-cacheable access types . For these two types of Load instructions, there is no fixed execution delay time, so it ne...

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Abstract

The invention provides a method and system for predicting the execution delay of a Load instruction. The method includes: comparing the dispatched Load command with the input in the buffer, and judging whether it matches; if it matches, storing the prediction result in the launch queue, judging whether the prediction result is correct, and if it is correct, not updating the corresponding command in the buffer. If the input is not correct, update the corresponding input in the buffer; if it does not match, then judge whether the Load command is a cacheable access, if so, do not create the corresponding input in the buffer, if not, create the corresponding input in the buffer input of. The invention can improve prediction accuracy and reduce adverse effects caused by prediction errors.

Description

technical field [0001] The invention relates to the technical field of computer architecture, in particular to a method and system for predicting execution delay of a Load instruction. Background technique [0002] In order to reduce the impact of data dependency (Data Dependency) between instructions on performance in modern processors, it is calculated in advance when the previous instruction can provide the source operand (Source Data), so that subsequent instructions that have dependencies on the previous instruction Can be launched early. But if the previous instruction is a Load instruction (an instruction that reads data from memory), the situation is slightly more complicated. The access attribute of the Load instruction may be Non-Cacheable (non-cacheable access) or Device (peripheral access), then it needs to read data on the external bus of the processor, and the required delay time (Latency) cannot be estimated. In addition, even if the access attribute of the ...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/38
CPCG06F9/3861
Inventor 孙浩刘权胜余红斌
Owner SPREADTRUM COMM (SHANGHAI) CO LTD
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