Method and device for simulating smooth transition of reference clock in a locked state of phase-locked loop

Abstract

The invention discloses a method and a device for simulating smooth transition of a reference clock in a locked state of a phase-locked loop. The device comprises: an input logic unit which is connected with a voltage-controlled oscillator in the analog phase-locked loop and is used for carrying out logic operation on a received reference signal of the analog phase-locked loop and a feedback signal sent by the voltage-controlled oscillator when the analog phase-locked loop is converted into a reference clock switching state from a normal locking state so as to obtain phase difference information between the reference signal and the feedback signal; and a phase detection unit which is connected with the input logic unit and a phase frequency detector in the analog phase-locked loop, and isused for detecting whether the phase difference information reaches a preset condition or not and outputting a reset signal to a reset interface of the phase frequency detector when the phase difference information reaches the condition.

Description

technical field [0001] The invention relates to the field of information processing, in particular to a method and a device for simulating the smooth transition of a reference clock in a locked state of a phase-locked loop. Background technique [0002] The analog phase-locked loop is a module that provides local oscillation signals in the RF transceiver system. When the reference clock frequency of the analog phase-locked loop remains unchanged and the phase jumps, the analog phase-locked loop will enter a locked cycle again, although the final locked frequency and The frequency before the jump is the same, but in the locking process, the output frequency of the analog phase-locked loop will undergo a large fluctuation, so that the lock is lost. For some radio frequency transceiver systems, there are requirements for the fluctuation range of the local oscillator frequency during use. Excessive frequency fluctuations will lead to a decrease in the system signal-to-noise rati...

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Problems solved by technology

[0002] The analog phase-locked loop is a module that provides local oscillation signals in the RF transceiver system. When the reference clock frequency of the analog phase-locked loop remains unchanged and the phase jumps, the analog phase-locked loop will enter a locked cycle again, although the final locked frequency and The frequency before the jump is the same, but during the locking process, the output frequency of the analog phase-locked loop will undergo a large fluctuation, so that the lock is lost

For some radio frequency transceiver systems, there are requirements for the fluctuation range of the local oscillator frequency during use. Excessive frequency fluctuations will lead to a decrease in the system signal-to-noise ratio and an increase in the bit error rate.

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