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Manufacturing method of SONOS device

A manufacturing method and device technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve problems such as insufficient ONO etching process window

Active Publication Date: 2020-06-30
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a manufacturing method of a SONOS device to solve the problem of insufficient etching process window of the current ONO, optimize the step height between different regions in the SONOS device, and improve the reliability of the device

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  • Manufacturing method of SONOS device
  • Manufacturing method of SONOS device
  • Manufacturing method of SONOS device

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Embodiment Construction

[0038] The structure of the existing SONOS flash memory usually includes two devices, a selection tube and a storage tube, the area where the storage tube is located is the SONOS area (i.e. the CG area), and the area where the selection tube is located is the non-SONOS area (i.e. the SG area), wherein, The SONOS area needs the ONO structure, and the non-SONOS area does not need the ONO structure. The ONO etching of SONOS flash memory usually adopts dry etching, and the specific process is as follows: Figure 1A ~ Figure 1F : Step S01, such as Figure 1AAs shown, a semiconductor substrate 01 is provided, and the semiconductor substrate 01 is defined with a SONOS region (i.e., the A region) and a non-SONOS region (i.e., the B region) connected to the SONOS region, and the semiconductor substrate 01 is sequentially formed with sacrificial regions. An oxide layer 02 and an ONO layer 03, the sacrificial oxide layer 02 and the ONO layer 03 cover the SONOS region and the non-SONOS r...

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Abstract

The invention provides a manufacturing method of an SONOS device. The method comprises the following steps: opening a non-SONOS region; firstly, removing a blocking oxide layer of an ONO layer in a non-SONOS region; then, removing the nitride layer of the ONO layer in the non-SONOS region; and then removing the sacrificial oxide layer of the non-SONOS region and the first blocking oxide layer of the SONOS region at the same time. On one hand, the problem of insufficient etching window of the current ONO layer is solved, and on the other hand, the step height difference between different regions in the SONOS device is optimized, and the reliability of the device is improved.

Description

technical field [0001] The invention relates to the technical field of manufacturing semiconductor devices, in particular to a method for manufacturing a SONOS device. Background technique [0002] SONOS (Silicon-Oxide-Nitride-Oxide-Silicon, silicon-oxide-nitride-oxide-silicon, also known as silicon oxide nitride oxide silicon) flash memory has small cell size, good storage retention, low operating voltage, and CMOS Process compatibility and other characteristics. The structure of the existing SONOS flash memory usually includes two devices, a selection tube (SG, selectgate) and a storage tube (CG, controlgate). In the SONOS region (that is, the SG region), the SONOS region requires an ONO (Oxide-Nitride-Oxide, oxide layer-nitride layer-oxide layer) structure, and the non-SONOS region does not require an ONO structure. The ONO etching of SONOS flash memory usually adopts dry etching. The specific process is usually to first remove the ON layer in the non-SONOS area (ie SG ...

Claims

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Application Information

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IPC IPC(8): H01L21/311H01L21/28H01L27/11524H01L27/1157
CPCH01L21/31111H01L21/28008H10B41/35H10B43/35
Inventor 董立群刘政红奇瑞生黄冠群陈昊瑜邵华
Owner SHANGHAI HUALI MICROELECTRONICS CORP