Asymmetric Chireix synthesis architecture and design method thereof

Abstract

The invention discloses an asymmetric Chireix synthesis architecture and a design method thereof. The asymmetric Chireix synthesis architecture comprises a first branch and a second branch, wherein the first branch is provided with a first power amplifier, the second branch is provided with a second power amplifier, the input end of the first power amplifier is connected with a first signal, the input end of the second power amplifier is connected with a second signal, and the first signal and the second signal are asymmetric constant envelope phase modulation signals; and the output ends of the first power amplifier and the second power amplifier are connected with the asymmetric Chireix power combiner. By the adoption of the asymmetric Chireix synthesis framework, the out-phase angle issmaller than that of a traditional Chireix synthesis framework, the output efficiency of the traditional Chireix synthesis framework can be improved, the situation that the traditional Chireix synthesis framework can only achieve high-efficiency output at a single frequency point can be improved, and the bandwidth is expanded.

Description

technical field [0001] The invention belongs to the technical field of radio frequency power amplifiers, and in particular relates to an asymmetrical Chireix synthesis framework and a design method thereof. Background technique [0002] At present, 5G technology is hot. As a next-generation wireless communication network, compared with the currently popular 4G technology, it has a higher network transmission rate, which can reach hundreds of times that of 4G at the fastest. With the requirement of higher and higher communication rates, modern wireless communication systems use more and more complex and effective digital modulation methods, resulting in a relatively large peak-to-average power ratio of the signal. This signal is of great significance for RF power amplifiers in high-speed communications. It can also maintain the bandwidth of the signal while maintaining high efficiency, but it will lead to deterioration of linearity. In order to solve the linear efficiency pr...

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Problems solved by technology

[0007] Aiming at the defects existing in the existing design methods, the present invention proposes an asymmetric Chireix synthesis architecture and design method thereof, adopting a new type of asymmetric Chireix synthesizer, which has a smaller out-of-phase angle than the traditional Chireix power synthesizer, improving the efficiency, and at the same time Solve the problem that the traditional Chireix synthesis architecture can only achieve high efficiency at a single frequency point

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