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Domestication heterogeneous computing acceleration platform

A heterogeneous, platform technology, applied in computing, computers, digital computer components, etc., can solve problems such as insufficient performance, and achieve the effect of improving computing performance

Pending Publication Date: 2020-09-01
TIANJIN QISUO PRECISION ELECTROMECHANICAL TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the computing center deployed in the ship still adopts the CPU cluster parallel computing architecture, and its processor performance and power consumption are constantly approaching the physical limit, and its performance can no longer meet the needs of application scenarios such as artificial intelligence and big data. Therefore, it is necessary to develop new computing Architecture breaks through performance bottlenecks

Method used

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  • Domestication heterogeneous computing acceleration platform
  • Domestication heterogeneous computing acceleration platform
  • Domestication heterogeneous computing acceleration platform

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Embodiment Construction

[0017] The present invention will be described in further detail below in conjunction with the accompanying drawings.

[0018] A domestically-made heterogeneous computing acceleration platform, implemented by the following four core technologies: GPU-based heterogeneous parallel acceleration technology, FPGA-based heterogeneous parallel acceleration technology, heterogeneous acceleration stack middleware design and implementation, and many-core collaborative processing technology. Heterogeneous computing is the integration of computing units with different instruction sets and architectures, submitting appropriate computing tasks to dedicated accelerators for accelerated computing, and sharing the CPU task load.

[0019] Such as figure 1 As shown, the domestically produced heterogeneous computing acceleration platform proposed by the present invention consists of an accelerator hardware platform (CPU, GPU, FPGA), an operating system layer, a GPU accelerator driver layer and a...

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Abstract

The invention relates to a domestication heterogeneous computing acceleration platform which is technically characterized by comprising an accelerator hardware platform, an operating system layer, a GPU accelerator driving layer, an FPGA accelerator driving layer, heterogeneous acceleration stack middleware, an application program and an acceleration library. The accelerator hardware platform is responsible for computing storage resource allocation and scheduling; the GPU accelerator driving layer and the FPGA accelerator driving layer provide bottom hardware internal resource management interfaces for heterogeneous platform middleware to call; the acceleration stack middleware maps heterogeneous system computing and storage resources to an operating system user space, and provides a standardized calling interface for a top application program; the acceleration library provides basic operation parallelization and bottom layer optimization, when an application program is executed, the host submits a calculation kernel and an execution instruction, and calculation is executed in a calculation unit on the equipment. The heterogeneous many-core acceleration stack and the heterogeneousparallel computing framework are constructed, the difference between heterogeneous system platforms is hidden, and domestication of heterogeneous acceleration software and hardware platforms is achieved.

Description

technical field [0001] The invention belongs to the field of computer heterogeneous technology, in particular to a localized heterogeneous computing acceleration platform. Background technique [0002] With the rapid development of intelligence and informatization, equipment such as ship combat command systems, integrated navigation, cloud computing centers, and cryptographic systems have put forward higher requirements for computing performance. At present, the computing center deployed in the ship still adopts the CPU cluster parallel computing architecture, and its processor performance and power consumption are constantly approaching the physical limit, and its performance can no longer meet the needs of application scenarios such as artificial intelligence and big data. Therefore, it is necessary to develop new computing The architecture breaks through performance bottlenecks. [0003] With the impact of the "ZTE incident", the independent and controllable localization...

Claims

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Application Information

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IPC IPC(8): G06F15/78
CPCG06F15/7839G06F15/78
Inventor 于潼韩华锦赵文宇白梦莹张文月
Owner TIANJIN QISUO PRECISION ELECTROMECHANICAL TECH
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