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Polycrystalline silicon thin film forming method and semiconductor structure forming method

A polysilicon film and semiconductor technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as abnormal nucleation on the surface of polysilicon films, to avoid jacking up, suppress nucleation abnormalities, and reduce damage rates Effect

Pending Publication Date: 2020-09-29
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The purpose of the present invention is to provide a method for forming a polysilicon film to solve the problem of abnormal nucleation on the surface of a polysilicon film in the prior art, resulting in abnormally grown large crystal grains

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  • Polycrystalline silicon thin film forming method and semiconductor structure forming method
  • Polycrystalline silicon thin film forming method and semiconductor structure forming method
  • Polycrystalline silicon thin film forming method and semiconductor structure forming method

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Embodiment Construction

[0035] The specific implementation manner of the present invention will be described in more detail below with reference to schematic diagrams. The advantages and features of the present invention will be more apparent from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

[0036] see figure 1 , figure 1 A schematic flow diagram of a method for forming a polysilicon film provided by the present invention, the method includes the following steps:

[0037] Step S100, providing a semiconductor substrate, and depositing a first polysilicon layer on the semiconductor substrate;

[0038] In this embodiment, the semiconductor substrate may be at least one of the materials mentioned below: Si, Ge, SiGe, SiC, SiGeC, InAs, GaAs, InP or other III / V compound semiconductors, including these Th...

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Abstract

The invention provides a polycrystalline silicon thin film forming method and a semiconductor structure forming method. The polycrystalline silicon thin film forming method is applied to the field ofsemiconductors. The method comprises the steps of providing a semiconductor substrate and forming a first polycrystalline silicon layer on the semiconductor substrate; and forming a carbon-doped second polycrystalline silicon layer on the first polycrystalline silicon layer, wherein the second polycrystalline silicon layer and the first polycrystalline silicon layer form a required polycrystallinesilicon thin film. According to the embodiment of the invention, on the basis of keeping the material structure of the polycrystalline silicon thin film in the semiconductor structure unchanged, thepolycrystalline silicon thin film is changed into a two-layer structure from a one-layer structure in the prior art, and the top layer is the doped polycrystalline silicon layer containing carbon ions. Due to the fact that the polycrystalline silicon layer doped with the carbon ions has inhibiting and refining effects on the surface of the polycrystalline silicon thin film, the abnormal surface nucleation of the polycrystalline silicon thin film is inhibited, and the probability that abnormally-growing large crystal grains are generated on the surface of the polycrystalline silicon thin film is reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a polysilicon thin film and a method for forming a semiconductor structure. Background technique [0002] FLASH (flash memory) devices are generally divided into two types according to their structures: stacked gate devices and split gate devices. A stacked gate device generally includes a floating gate and a control gate, wherein the floating gate is located between the control gate and the substrate and is in a floating state for storing data; the control gate is connected to a word line and is used for controlling the floating gate. [0003] A tunnel oxide layer is also included between the floating gate and the substrate, and an isolated inter-gate dielectric layer is also included between the floating gate layer (doped with phosphorus) and the control gate layer. Each flash memory cell is isolated by a shallow trench isolation (STI) ...

Claims

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Application Information

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IPC IPC(8): H01L21/28H01L21/285
CPCH01L21/28512H01L29/40114
Inventor 李泓博高杏
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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