Semiconductor packaging method and semiconductor packaging structure

Abstract

The invention provides a semiconductor packaging method and a semiconductor packaging structure. The semiconductor packaging method comprises the steps that at least one to-be-packaged chip and an auxiliary member are mounted on a carrier plate, wherein the auxiliary member comprises auxiliary structures in one-to-one correspondence with the chips, the auxiliary structure comprises an auxiliary part arranged on the peripheral side of the chip, the chip comprises a first surface and a second surface opposite to the first surface, the first surface is provided with a plurality of welding pads, and the first surface of the chip faces the carrier plate, the auxiliary part comprises a third surface and a fourth surface opposite to the third surface, the third surface faces the carrier plate, and a gap exists between the third surface and the carrier plate; an encapsulation layer is formed, the encapsulation layer covers the carrier plate and encapsulates the at least one to-be-packaged chipand the auxiliary part, the second surface and the fourth surface are exposed out of the encapsulation layer, and the third surface is covered by the encapsulation layer; a heat dissipation layer isformed on one side of the first surface, wherein the heat dissipation layer covers the chip and the auxiliary structure; the material of the heat dissipation layer and the material of the auxiliary structure are both metal.

Description

technical field [0001] The present application relates to the field of semiconductor technology, in particular to a semiconductor packaging method and a semiconductor packaging structure. Background technique [0002] Common semiconductor packaging technology, such as chip packaging technology, mainly includes the following process: first, the front of the chip is bonded to the carrier board with adhesive tape, heat-pressed and molded, the carrier board is peeled off, and then a rewiring structure is formed on the front side of the chip, and for encapsulation. [0003] In order to improve the heat dissipation performance of the chip, a metal heat dissipation layer is usually formed on the back of the chip during the packaging process. However, the materials of the metal heat dissipation layer and the chip and the encapsulation layer are different, and the lattice constants of different materials are different, resulting in poor bonding between the chip and the encapsulation...

AI Technical Summary

Problems solved by technology

However, the materials of the metal heat dissipation layer and the chip and the encapsulation layer are different, and the lattice constants of different materials are different, resulting in poor bonding between the chip and the encapsulation layer and the metal heat dissipation layer, and the metal heat dissipation layer and the chip and the encapsulation layer may be Delamination will occur, affecting the reliability of the product

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