Word line power supply control circuit of magnetic random access memory unit

Abstract

The invention provides a word line power supply control circuit of a magnetic random access memory. The word line power supply control circuit comprises a read-write control circuit and a logic control circuit between word line decoders of the read-write control circuit. The logic control circuit has a word line feedback function to adjust and control a write control feedback signal of a read operation. In the mode, the selected word line is quickly charged according to the writing / reading operation, so that the rising delay of the reading operation word line of the word line power supply control circuit is reduced, and the reading speed is increased. The operation is simple, and the reliability is high.

Description

technical field [0001] The present application relates to the technical field of registers, in particular to a word line power control circuit for magnetic random access memory. Background technique [0002] In the current MRAM (Magnetic Random Access Memory), the word line power supply control circuit generally adopts the read and write separation method: that is, during the read operation, the required word line read potential is applied to the selected word line through the word line decoder through the read control signal. word line. During a write operation, the V DD A high voltage is applied to the selected word line. When the power supply of the word line is switched according to the read and write operations, a high-voltage device is usually used to transmit the write potential of the word line. Since the on-resistance of the high-voltage device itself is relatively large, the rising delay of the word line voltage is increased. In the current technology, a charge ...

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Problems solved by technology

However, this kind of circuit needs to design a charge sharing capacitor, and the capacitance value needs to be known from actual experiments, so it is not easy to determine

Moreover, if the ratio of the capacitance value to the word line capacitance is too small or too large, either the initial voltage of the selected word line is too low, which is not conducive to the rising delay of the read word line, or a charge sharing capacitor with a relatively large capacity is required, thereby occupying a large chip area. ; Or use other types of capacitors, which may increase the cost of chip manufacturing

In addition, the charge sharing capacitor and the word line capacitor will act as a charging load at the same time, which will increase the delay in the potential rise of the read word line.

Moreover, the charge sharing circuit needs to cooperate with the pulse circuit to generate the pulse signal alone. In addition to occupying a part of the chip area, it is also vulnerable to process fluctuations and causes device delay deviation, that is, the pulse width difference between chips is large. In some cases, the voltage on the word line of the selected cell is high, which may introduce stress problems, which will increase the threshold voltage of the cell access transistor, which is not conducive to the write drive of the MRAM cell.

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