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In-memory computing system supporting universal computing based on magnetic random access memory

A magnetic random access memory and computing system technology, applied in static memory, digital memory information, information storage, etc., can solve problems such as difficult to meet ultra-low power consumption

Active Publication Date: 2020-10-20
BEIHANG UNIV
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  • Summary
  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Some studies have proposed in-memory computing solutions based on SRAM and DRAM. Although the data communication overhead has been greatly reduced, as volatile memories, the static power consumption of SRAM and DRAM has become an important factor affecting their performance, making it difficult to meet future requirements. Ultra-low power consumption requirements based on big data application scenarios

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  • In-memory computing system supporting universal computing based on magnetic random access memory
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  • In-memory computing system supporting universal computing based on magnetic random access memory

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Embodiment Construction

[0033] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments.

[0034] The general-purpose computing-oriented in-memory computing system based on the spin-transfer torque magnetic random access memory proposed in this embodiment includes a self-designed GCIM architecture. figure 1 It is an overall schematic diagram of the GCIM architecture of this embodiment, which includes a spin-transfer torque magnetic random access memory array (2T1MTJ STT-MRAM arrary) based on 2 transistors and 1 magnetic tunnel junction, an improved shifter and connector Mser&Cor (Modified Shifter and Connector ), row decoder RD (Row Decod...

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Abstract

The invention belongs to the field of general in-memory computing, in particular to an in-memory computing system supporting general computing based on a magnetic random access memory. The in-memory computing system comprises a GCIM architecture, and the GCIM architecture comprises a spin transfer torque magnetic random access memory array, a shifter, a connector, a row decoder, a column decoder,a bit line driver, a calculation word line digital-to-analog converter, a pre-charging induction amplifier, a fifth-generation reduced instruction set processor, an instruction parser and a register.According to the invention, storage can be realized in the memory, and calculation operation can be carried out in the memory. Moreover, the method can effectively support general calculation (including logic calculation, fixed-point calculation, floating-point calculation and the like), fully utilizes a plurality of sub-array structures and improved shifters and connectors, improves the reconfigurability and calculation parallelism of the architecture, and improves the calculation efficiency.

Description

technical field [0001] The invention belongs to the field of general in-memory computing, in particular to an in-memory computing system and a computing method for general computing based on spin transfer torque magnetic random access memory (STT-MRAM). Background technique [0002] Over the past few decades, the size of datasets has grown exponentially over time, placing ever greater computational demands on data analysis applications. However, for traditional von Neumann architectures, the overhead of data communication between processors and memory units leads to huge performance degradation and energy consumption, known as the von Neumann bottleneck. [0003] In order to overcome the data communication bottleneck, a widely recognized method is to embed the processor in the memory, that is, in-memory computing. Some studies have proposed in-memory computing solutions based on SRAM and DRAM. Although the data communication overhead has been greatly reduced, as volatile me...

Claims

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Application Information

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IPC IPC(8): G11C11/16
CPCG11C11/161G11C11/1675
Inventor 贾小涛潘宇杨建磊赵巍胜
Owner BEIHANG UNIV
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