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Data intersection processing system and method

A technology for processing systems and data, applied in the field of communications, can solve problems such as high cost, high FPGA operating frequency, and large FPGA resource requirements

Active Publication Date: 2020-10-23
ZHEJIANG EBANG COMM
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The current STM-N data interleaving processing method uses a time slot interleaving table for each channel to realize data interleaving. However, the existing technology requires a lot of FPGA resources, the cost is high, and the existing technology requires a higher FPGA operating frequency. , so it is necessary to improve the existing data cross-processing method

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  • Data intersection processing system and method

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Embodiment Construction

[0045]The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0046] It should be noted that, in the case of no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other.

[0047] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but not as a limitation of the present invention.

[0048] The present invention includes a processing system for data interleaving, such as figure 1 shown, includi...

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Abstract

The invention provides a data cross processing system and method, and the system comprises: a conversion module which carries out the format conversion of first STM-N data, so as to obtain second STM-N data; a crossover table configuration module which is used for setting two time slot crossover tables corresponding to each STM-N channel, wherein a first storage unit in each time slot crossover table is used for storing time slot information of second STM-N data in each time slot in the STM-N channel, each second storage unit in the storage module corresponds to one STM-N channel, the second storage units are used for storing channel data of second STM-N data in the STM-N channels, and the channel data comprises time slot data of all time slots in the two time slot cross tables; and a table lookup module which queries corresponding time slot information according to the sent time slot cross table content, and searches channel data corresponding to the time slot information in the storage module. The data cross processing system and method have the beneficial effects that the storage space in the data cross processing process is effectively reduced, the working clock frequency is reduced, and the requirements on resources and performance of the FPGA are reduced.

Description

technical field [0001] The invention relates to the field of communication technology, in particular to a data cross processing system and method thereof. Background technique [0002] With the development of information technology and people's huge demand for communication bandwidth, the communication network has changed from analog network to digital network. The development of optical fiber technology has greatly promoted the development of digital communication technology to meet people's demand for communication bandwidth. Fiber optic equipment provides low-cost, high-speed information transmission, quickly replacing traditional copper cable transmission equipment. In order to adapt to the development of optical fiber technology, unify the products of various communication manufacturers, and realize the intercommunication of transmission information, the ITU has formulated the communication standard of Synchronous Digital Hierarchy (SDH, Synchronous Digital Hierarchy). ...

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Application Information

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IPC IPC(8): H04L5/00
CPCH04L5/003H04L5/0058Y02D10/00
Inventor 杭炜
Owner ZHEJIANG EBANG COMM