Array substrate and preparation method thereof and display device

Abstract

The embodiment of the invention discloses an array substrate and a preparation method thereof, and a display device, relates to the technical field of display, and aims to prevent an active layer frombeing over-etched and reduce the process frequency and the manufacturing cost. The array substrate comprises an underlayer substrate, a light shading pattern, a buffer pattern, an active layer, a gate insulating layer, a first passivation layer and source and drain electrodes, wherein the orthographic projection of the buffer pattern on the underlayer substrate covers the orthographic projectionof the active layer on the underlayer substrate, the orthographic projection of the buffer pattern on the underlayer substrate is within the orthographic projection range of the light shading patternon the underlayer substrate, the area of the orthographic projection of the buffer pattern on the underlayer substrate is smaller than that of the orthographic projection of the light shading patternon the underlayer substrate, a first via hole, a second via hole and a third via hole are formed in the gate insulating layer and the first passivation layer, one of the source electrode and the drainelectrode is coupled with the active layer through the first via hole, and the other one is coupled with the active layer through the second via hole and is coupled with the light shading pattern through the third via hole. The array substrate is applied to the display device, so that the display device displays a picture.

Description

technical field [0001] The present disclosure relates to the field of display technology, and in particular to an array substrate, a manufacturing method thereof, and a display device. Background technique [0002] At present, with the development of liquid crystal display technology, metal oxide thin film transistors (Thin Film Transistor, TFT for short), for example, Indium Gallium Zinc Oxide (IGZO for short) thin film transistors, have high carrier mobility rate, gradually attracting people's attention. [0003] In the related art, a patterning process is used to form multiple film layers of metal oxide thin film transistors. The process steps of the patterning process are relatively complicated and the cost is high. Therefore, how to reduce the number of patterning processes to reduce the process cost and material cost, and improve the productivity of metal oxide thin film transistors is one of the main issues in the current research field. Contents of the invention ...

AI Technical Summary

Problems solved by technology

The process steps of the patterning process are more complicated and the cost is higher. Therefore, how to reduce the number of patterning processes to reduce the process cost and material cost and improve the production capacity of metal oxide thin film transistors is one of the main issues in the field of research at present.

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