Digital signal glitch elimination circuit and glitch elimination method

A technology for eliminating circuits and digital signals, which is applied to logic circuits with logic functions, electrical components, pulse processing, etc. It can solve the problems of small burr width programming and large logic complex area, and achieve the effect of ensuring transmission and pick-up
CN112003593APending Publication Date: 2020-11-27SHANGHAI CHIPANALOG MICROELECTRONICS LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHANGHAI CHIPANALOG MICROELECTRONICS LTD
Publication Date
2020-11-27

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Abstract

The invention provides a digital signal glitch elimination circuit, which comprises an analog elimination circuit, and is characterized in that the analog elimination circuit comprises an MOS inverter, an MOS nested inverter, a resistor array and a capacitor. The output end of the analog elimination circuit is electrically connected with a digital elimination circuit, a signal link unit and a logic processing unit are arranged in the digital elimination circuit, the signal link unit is used for carrying out delay processing on an input digital signal, and the logic processing unit is used forcarrying out logic operation on the digital signal subjected to delay processing. The analog elimination circuit is used for eliminating digital signal glitches whose glitch time width is smaller thanan input clock signal period, and the digital elimination circuit is used for eliminating digital signal glitches whose glitch time width is larger than the input clock signal period and outputting the digital signal glitches as OUT. Through the combination of the analog elimination circuit and the digital elimination circuit, burrs generated in the digital signal transmission process are eliminated, and the circuit has the advantages of being capable of eliminating high-level and low-level burrs at the same time, programmable in burr elimination time width, small in area and the like.
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Description

Technical field

[0001] The invention belongs to the field of integrated circuit design and relates to digital signal processing technology, in particular to a digital signal burr elimination circuit and a burr elimination method. Background technique

[0002] The transmission of digital signals is common in the field of integrated circuit design such as digital isolators and wireless communications. However, due to timing errors, interference signals and other factors, a large number of random glitches are often generated during the transmission of digital signals. The existence of random glitches can interfere with the transmission of digital signals, and even cause signal reception failures in severe cases. Therefore, it is usually necessary to add a glitch elimination circuit in the digital signal transmission path to eliminate the glitch and retain the complete desired signal.

[0003] At present, the existing glitch elimination circuits are mainly divided into two categories:...

Claims

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