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Plating method to reduce or eliminate voids in solder applied without flux

A coating and plating bath technology, applied in the direction of stress/deformation reduction in printed circuits, metal pattern materials, electrolytic components, etc., can solve problems such as failure of electroplating base solder joints

Pending Publication Date: 2020-11-27
HUTCHINSON TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Following the corresponding disclosures of these patents, failure of solder joints on plated substrates can easily occur

Method used

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  • Plating method to reduce or eliminate voids in solder applied without flux
  • Plating method to reduce or eliminate voids in solder applied without flux
  • Plating method to reduce or eliminate voids in solder applied without flux

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Embodiment Construction

[0023] Such as figure 1 As shown, which is an x-ray image of solder joints 11, 12 and 13 in PCB 10, voids 14, 15 can be clearly seen in solder joint 12. Voids 16, 17 and 18 can be seen in solder joint 13. Voids of 15-30 μm are classified as "Type 2". Type 1 voids have a diameter of less than 15 μm. At this magnification, the solder joint 11 exhibits no visible voids. The subject of the first embodiment of the invention is the elimination of these voids of the solder joints or any voids which lead to subsequent failure of the solder joints when they are made on metallized substrates. Microvoids in solder joints are voids less than 1 mil (25 μm) in diameter that are typically found at the solder-to-pad interface in one plane. Planar microvoiding affects solder joint reliability in the following ways. Planar microvoids initiate cracks faster and propagate cracks faster during temperature cycling, and their effect is proportional to the density of planar microvoids present in ...

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Abstract

A method of plating a copper substrate with gold that reduces or eliminates the presence of microvoids at the interface of the gold / copper substrate is described. Suitably, live entry of the substrateinto the plating bath is performed with application of external current to the bath such that no portion of the substrate is exposed to the bath for more than one second without the application of the external current. Increase of the applied current for gold strike to the mass-transfer-limit for gold reduction accomplishes the full measure of improvement in eliminating microvoids.

Description

technical field [0001] Analyze defects in solder joints to determine why electroplated copper solder joints experience failure. Defects in solder joints, particularly in printed circuit boards (hereinafter "PCBs"), have been widely experienced throughout industries that manufacture and use PCBs, but the root cause of the problem had not been identified prior to this disclosure. After extensive research, the inventors discovered that the presence of microvoids at the interface of the plated metal on copper was responsible for the failure of subsequently formed solder joints. The present inventors have discovered a process for metal plating a copper substrate that eliminates the formation of micro voids at the plated metal-substrate interface (which is the root cause of subsequent solder joint failure). Background technique [0002] The metal plating process is well known as it is described in the book "Fundamentals of Electrochemical Deposition" by Paunovic and Schlesinger. ...

Claims

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Application Information

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IPC IPC(8): C25D3/00C25D3/02C25D3/48C25D5/00C25D5/02C25D17/00
CPCC25D7/00C25D3/48C25D17/06C25D5/10H05K3/241H05K2201/0347H05K2203/0723H05K1/0271C25D5/623H05K3/188H05K1/09
Inventor D·P·里默P·F·拉德维希
Owner HUTCHINSON TECH
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