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Method for reducing transmission delay of receiving channel of toe-based high-frequency trading terminal

A high-frequency trading and terminal receiving technology, applied in the field of data transmission, can solve problems such as reducing the real-time performance of transmitted data, uncontrollable changes in delay, and large end-to-end delay, achieving low transmission delay performance, reducing delay, damage The effect of control

Active Publication Date: 2022-06-07
山东产研集成电路产业研究院有限公司
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  • Claims
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Problems solved by technology

[0005] The traditional way to implement the TCP / IP protocol is to use the CPU to run the software, but the software that implements the TCP / IP protocol usually runs in parallel with the software that executes high-frequency trading-related algorithms. The two occupy system resources, thereby reducing the real-time performance of transmitted data. The specific performance is that the end-to-end delay is relatively large, and the range of uncontrollable changes in the delay is large.

Method used

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  • Method for reducing transmission delay of receiving channel of toe-based high-frequency trading terminal

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Embodiment

[0017] FPGA has the characteristics of high speed, parallelism, accurate timing and flexible function, and is especially suitable for realizing TOE. The method of this embodiment can give full play to these characteristics of the FPGA technology, and consider the link layer as a component of the TOE to be considered uniformly, so as to reduce the transmission delay of the application layer data of the receiving channel. Therefore, in this embodiment, an FPGA is preferably used to implement the TOE.

[0018] like figure 2 Shown is an Ethernet frame carrying a TCP segment and an application layer data field transmitted on the network line after the TCP connection is established. After each byte is parsed by the functional module before the TOE, it is sent to the Input port of TOE. figure 2 The upper part of the middle is the process of TOE parsing the application layer data field from the Ethernet frame, and the lower part is the process of the high frequency trading termina...

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Abstract

The invention relates to a method for reducing the transmission delay of a receiving channel of a TOE-based high-frequency trading terminal. In the method, the TOE uploads the analyzed application layer data fields to The high-frequency trading terminal greatly reduces the delay of the application layer data field in the receiving channel of the high-frequency trading terminal; at the same time, for the occasional data errors in the uploading of business information that may exist in the original byte stream, in the TOE receiving channel , The high-frequency trading terminal has designed a mechanism for reissuing confirmation information after data upload, so as to control the damage caused by occasional errors in the source data in the straight-through forwarding mode at a low level, so that the receiving channel of the high-frequency trading terminal It has availability while having extremely low transmission delay performance.

Description

technical field [0001] The invention relates to a method for reducing the transmission delay of a receiving channel of a TOE-based high-frequency trading terminal, and belongs to the technical field of data transmission. Background technique [0002] High-frequency trading is a popular application scenario in the field of fintech. The trading participants of high-frequency trading use high-performance communication and computing systems to obtain the latest market information released by the exchange in real time, quickly analyze the market information, and quickly predict the market change trend in the sub-second time range, and then target them. This time-domain micro-trend quickly formed a micro-spread trading order and quickly sent it to the exchange, locking in the trading right before the trend changed and competitors, and obtained this small profit. Such high-frequency operations will accumulate to form stable and considerable profits for a long period of time. [0...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04L69/16H04L69/163H04L1/00H04L47/193
CPCH04L69/16H04L69/163H04L1/0061H04L47/193Y02D30/50
Inventor 林伟温士魁王彬刘晓峰滕达曹山
Owner 山东产研集成电路产业研究院有限公司
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