FPGA on-orbit debugging method for component flight verification

Abstract

The invention discloses an FPGA on-orbit debugging method for component flight verification, and the method comprises the following steps: S1, enabling a debugging client to be connected with a groundstation through a cable, enabling the ground station to initiate a transmission request to an on-orbit spacecraft antenna terminal through a satellite-ground communication link, waiting for the establishment of communication, and then the ground terminal initiating an FPGA downloading or debugging information transmission request; S2, after receiving the request information, the on-orbit spacecraft antenna terminal transmitting the connection establishment information to the MCU through the Ethernet; S3, the MCU receiving and analyzing an Ethernet data packet containing FPGA downloading or debugging information, and then sending the information to the FPGA through a user-defined JTAG link; S4, after receiving the information of the downloading or debugging information request ground station, the FPGA returning response information and handshake data to the MCU; and S5, after the MCU receives response information and handshake data returned by the FPGA, the information being transmitted to the on-orbit spacecraft antenna terminal through the Ethernet.

Description

technical field [0001] The present invention relates to a remote debugging method of FPGA oriented to flight test of components, aiming at the requirements of FPGA on-orbit debugging required for applications such as component flight verification, this method proposes on-orbit debugging based on satellite-ground link and MCU remote control method. There is no need to add a separate JTAG hardware link connection, and the relay processing of data and control signals is realized through the MCU, which solves the feasibility problem of on-orbit FPGA debugging, downloading and monitoring under unattended conditions. Background technique [0002] MCU (Micro Control Unit) micro control unit, also known as single chip microcomputer (Single Chip Microcomputer) or single chip microcomputer, is to reduce the frequency and specifications of the central processing unit (Central Process Unit) appropriately, and the memory (memory), counter ( Timer), USB, A / D conversion, UART, PLC, DMA an...

AI Technical Summary

Problems solved by technology

[0006] However, this method has the following problems: At present, the online reconstruction of components through the "MCU+FPGA" method can only realize the function of remote program download, and cannot perform remote debugging and testing.

Once an on-orbit FPGA fault occurs, only the software-level error handling can be realized through the host computer software, and the internal dynamic information of the on-orbit FPGA cannot be collected, and the design defects of the on-orbit FPGA cannot be accurately located and resolved.

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