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Memory device, recessed channel array transistor and preparation method thereof

A channel array and transistor technology, applied in the storage field, can solve problems such as threshold voltage difference, reduce the performance of recessed channel array transistors, etc., to achieve the effect of improving performance and improving uniformity

Pending Publication Date: 2021-01-05
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as the size of the recessed channel array transistor decreases, the curvature effect of the trench channel is more obvious, resulting in a larger difference in the threshold voltage of the transistor at different positions in the trench channel, which reduces the performance of the recessed channel array transistor.

Method used

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  • Memory device, recessed channel array transistor and preparation method thereof
  • Memory device, recessed channel array transistor and preparation method thereof
  • Memory device, recessed channel array transistor and preparation method thereof

Examples

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Embodiment Construction

[0043] Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided in order to give a thorough understanding of embodiments of the present disclosure.

[0044] In the drawings, the thicknesses of regions and layers may be exaggerated for clarity. The same reference numerals in the drawings denote the same or similar structures, and thus their detailed descriptions will be omitted.

[0045] The described features, structures, or characteristic...

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PUM

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Abstract

The invention provides a storage device, a recessed channel array transistor and a preparation method thereof, and belongs to the technical field of storage. The recessed channel array transistor includes an active region and a grid structure. The active region is provided with a groove channel, and the active region comprises a well region and a source-drain region; the grid structure comprises agrid and a grid insulating layer, the grid and the grid insulating layer are filled in the groove channel, and the grid insulating layer isolates the active region from the grid; the grid insulatinglayer comprises a first grid insulating layer and a second grid insulating layer, the first grid insulating layer is arranged on one side, close to a notch of the groove channel, of the second grid insulating layer, and the second grid insulating layer is arranged on one side, far away from the notch of the groove channel, of the first grid insulating layer; the dielectric constant of the first grid insulating layer is smaller than that of the second grid insulating layer. The recessed channel array transistor can improve the uniformity of threshold voltage.

Description

technical field [0001] The present disclosure relates to the field of storage technology, in particular to a storage device, a recessed channel array transistor and a manufacturing method thereof. Background technique [0002] With the continuous reduction of device size, recess channel access transistor (recess channel access transistor, RCAT) can be applied in DRAM (Dynamic Random Access Memory). However, as the size of the recessed channel array transistor decreases, the curvature effect of the trench channel is more obvious, resulting in a larger difference in the threshold voltage of the transistor at different positions in the trench channel, which reduces the performance of the recessed channel array transistor. . [0003] The above information disclosed in this Background section is only for enhancement of understanding of the background of the disclosure and therefore it may contain information that does not form the prior art that is already known in the art to a ...

Claims

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Application Information

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IPC IPC(8): H01L27/108H01L21/8242
CPCH10B12/34H10B12/053
Inventor 刘志拯
Owner CHANGXIN MEMORY TECH INC
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