Implementation method and device for reducing low-threshold units, equipment and storage medium

Abstract

The invention provides an implementation method and device for reducing low threshold units, equipment and a storage medium, and relates to the technical field of integrated circuits. The method comprises the steps: replacing all first threshold units in an integrated circuit with second threshold units, wherein the first threshold units are low threshold units, and the second threshold units arestandard threshold units or high threshold units; obtaining a first timing margin of the data path after unit replacement; determining a target data path of which the first time sequence allowance isnegative; obtaining a second time sequence margin of the data path where the starting point time sequence unit reaching the target data path is located, and a third time sequence margin of the data path where the terminal point time sequence unit starting from the target data path is located; according to the size relationship among the first time sequence allowance, the second time sequence allowance and the third time sequence allowance, performing time sequence repair on the target data path by adopting a repair mode corresponding to the size relationship. According to the method disclosedin the invention, the time sequence requirement of the integrated circuit can be met by using the least low threshold units.

Description

technical field [0001] The present invention relates to the technical field of integrated circuits, in particular to a method, device, equipment and storage medium for reducing low-threshold units. Background technique [0002] With the advancement of semiconductor process technology and the development of circuit integration, power consumption has become one of the key bottlenecks in current chip design. In early technologies, leakage power consumption was negligible, but in the current technology, leakage power consumption accounts for an increasing proportion and has become an important source of power consumption. Optimizing leakage power consumption is the key to low-power chip design. The primary task. [0003] Reducing the proportion of low-threshold (Low Vt, LVT) units can reduce leakage power consumption, so by adjusting the proportion of threshold units in the integrated circuit, the leakage power consumption of the integrated circuit can be adjusted. For example...

AI Technical Summary

Problems solved by technology

For example, if too many low-threshold units are used in an integrated circuit, the leakage current of the circuit will be relatively large, resulting in an increase in leakage power consumption of the circuit

However, if the LVT unit is forced to be reduced, it will affect the path timing of the integrated circuit

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