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Dual damsecene process method

A process method and trench technology, applied in the manufacturing of electrical components, electric solid-state devices, semiconductor/solid-state devices, etc., can solve the problems of affecting product quality, complex process flow, and high process cost, so as to reduce equipment input costs and reduce process costs. Unit, the effect of optimizing the process flow

Pending Publication Date: 2021-01-22
SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0023] The flow process of the above-mentioned existing method is more complicated, and the process cost is higher; in addition, the process flow complexity will also affect the product quality, if the process can be simplified, it will inevitably achieve unexpected technical effects

Method used

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Embodiment Construction

[0052] Such as figure 2 Shown is the flow chart of the method of the embodiment of the present invention; Figure 3A to Figure 3F Shown is a device structure diagram in each step of the method of the embodiment of the present invention. The double damascene processing method of the embodiment of the present invention comprises the following steps:

[0053] Step 1, such as Figure 3A As shown, a semiconductor substrate (not shown) is provided, on which a first interlayer film 3 , a trench etch stop layer 4 and a second interlayer film 5 are sequentially formed.

[0054] In the embodiment of the present invention, the bottom metal layer wiring 1 and the bottom metal layer wiring 1 for isolating the bottom metal layer wiring 1 are also formed between the bottom surface of the first interlayer film 3 and the top surface of the semiconductor substrate. Bottom dielectric film (not shown).

[0055] A metal diffusion barrier layer 2 is also formed on the surface of the bottom met...

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Abstract

The invention discloses a dual damsecene process method, which comprises the following steps of: 1, sequentially forming a first interlayer film, a trench etching stop layer and a second interlayer film on a semiconductor substrate, and performing selective etching to form an opening of a through hole; 2, depositing a light blocking protection layer to completely fill the opening of the through hole and extend to the whole surface of the second interlayer film outside the opening of the through hole; 3, forming a first photoresist pattern to open a trench forming region; 4, taking the first photoresist pattern as a mask to perform back etching on the light blocking protection layer; 5, etching the second interlayer film by taking the first photoresist pattern as a mask and the trench etching stop layer as a stop layer to form a trench; and 6, removing the first photoresist pattern and the light blocking protection layer. The process flow can be simplified, the process cost and the process time are saved, and the product quality can be improved.

Description

technical field [0001] The invention relates to a semiconductor integrated circuit manufacturing method, in particular to a dual Damascene (DD) process method. Background technique [0002] Such as Figure 1A to Figure 1F Shown is the structural diagram in each step of the existing double damascene process method. Existing double damascene process comprises the steps: [0003] Step 1, such as Figure 1A As shown, a semiconductor substrate (not shown) is provided, and a first interlayer film 103 , a trench etch stop layer 104 and a second interlayer film 105 are sequentially formed on the semiconductor substrate. [0004] Usually, an underlying metal layer connection 101 and an underlying dielectric film ( not shown). [0005] A metal diffusion barrier layer 102 is also formed on the surface of the bottom metal layer wiring 101 and the bottom dielectric film. [0006] Such as Figure 1B As shown, selective etching is performed to form an opening 106 of a through hole pa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768
CPCH01L21/76808H01L2221/1026
Inventor 李光磊吴庆仁林永顺
Owner SHANGHAI HUALI INTEGRATED CIRCUTE MFG CO LTD
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