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Method for improving throughput of block chain by using *zturk low-delay modular square algorithm

A modular square and blockchain technology, which is applied in the field of low-latency modular square algorithm to improve blockchain throughput, can solve problems such as the inability to realize large-scale modular square calculation of blockchain

Active Publication Date: 2021-02-09
SHANGHAI TECH UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The technical problem to be solved in the present invention is: The algorithm can realize the modular square operation of up to 1016-bit integers on an 8-bit computer, and cannot realize the larger-scale modular square operation required by the blockchain

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  • Method for improving throughput of block chain by using *zturk low-delay modular square algorithm
  • Method for improving throughput of block chain by using *zturk low-delay modular square algorithm
  • Method for improving throughput of block chain by using *zturk low-delay modular square algorithm

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Embodiment Construction

[0037] Below in conjunction with specific embodiment, further illustrate the present invention. It should be understood that these examples are only used to illustrate the present invention and are not intended to limit the scope of the present invention. In addition, it should be understood that after reading the teachings of the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms also fall within the scope defined by the appended claims of the present application.

[0038] The present invention provides a The method for improving the blockchain throughput by the low-latency modular square algorithm includes the following steps:

[0039] Step 1. Each miner M on the blockchain 1 ,...,M p from the respective owned s 1 ,...,s n Proof of generating space in space ps 1 ,..., ps n ;

[0040] Step 2. Each miner will prove their own space ps 1 ,..., ps n Input a unified hash function H( ...

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Abstract

The technical problem to be solved by the invention is that an algorithm can realize modular square operation of 1016-bit integers at most on an 8-bit computer and cannot realize larger-scale modularsquare operation required by a block chain. In order to solve the technical problem, the technical scheme of the invention provides a method for improving the throughput of a block chain by using a low-delay modular square algorithm. According to the method, the processing capacity of the algorithm on the 8-bit computer is expanded, so that the requirement of block chain leader election on modularsquare operation can be met. The extended algorithm is operated by using an 8-bit superconducting integrated circuit, so that the operation of the VDF can be accelerated, the consensus reaching timeis shortened, and the throughput of the block chain is improved.

Description

technical field [0001] The present invention relates to a A low-latency modular square algorithm method to improve blockchain throughput. Background technique [0002] In the blockchain consensus protocol, leader election (Leader Election) is often used to determine the attribution of block production rights and block rewards, and the workload proof mechanism (PoW) was once adopted. Since PoW needs to consume a large amount of computing resources and cause environmental pollution, the leader election in the blockchain consensus protocol is transitioning from the PoW scheme to a new scheme combining Proof of Space (PoSpace) and Verifiable Delay Function (VDF). The blockchain using the new scheme is energy-saving and environmentally friendly, but it still faces the performance bottleneck of throughput. In order to improve the throughput, accelerating the calculation speed of VDF is an urgent problem to be solved. [0003] A verifiable delay function (VDF) is a function who...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/556G06F7/523H04L9/06G06F16/27
CPCG06F7/556G06F16/27G06F7/523H04L9/0643Y02D10/00
Inventor 刘静张良峰
Owner SHANGHAI TECH UNIV
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