Method and device for reducing network-on-chip power consumption, CPU chip and server

A CPU chip and network-on-chip technology, applied in the computer field, can solve problems such as the inability to adjust the NoC operating frequency accurately

Active Publication Date: 2021-02-12
HYGON INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This kind of frequency conversion technology can optimize the energy consumption ratio of SOC to a certain extent, but because it cannot dynamically adjust the NoC operating frequency precisely, there is still a lot of room for improvement and improvement

Method used

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  • Method and device for reducing network-on-chip power consumption, CPU chip and server
  • Method and device for reducing network-on-chip power consumption, CPU chip and server
  • Method and device for reducing network-on-chip power consumption, CPU chip and server

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Embodiment Construction

[0067] The embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0068] It should be understood that the described embodiments are only some, but not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0069] On the one hand, an embodiment of the present invention provides a method for reducing power consumption of an on-chip network, such as figure 2 As shown, the method of this embodiment may include:

[0070] Step 101: Obtain the working status data of the network-on-chip NoC, the working status data includes the number of unresponsive requests initiated from the device in the NIU within a period of time window, the number of requests and responses cached in the RU within a period of time window, and the histo...

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Abstract

The embodiment of the invention discloses a method and device for reducing network-on-chip power consumption, a CPU chip and a server, relates to the technical field of computers, and can effectivelyreduce the network-on-chip power consumption. The method comprises the following steps: acquiring working state data of a network-on-chip (NoC), wherein the working state data comprises one or more ofthe number of non-responsive requests initiated by equipment in an NIU in a period of time window, the number of requests and responses cached in an RU in a period of time window, and NoC historicalbandwidth statistical data; calculating the expected working frequency of the NoC according to the working state data; and adjusting the working frequency of the NoC according to the expected workingfrequency. The method is suitable for occasions of reducing network-on-chip power consumption.

Description

technical field [0001] The present invention relates to the field of computer technology, and in particular, to a method, a device, a CPU chip and a server for reducing the power consumption of an on-chip network. Background technique [0002] With the development of integrated circuits and the improvement of processes, the integration degree of chips is constantly improving, and large-scale SOC (System on Chip, system-on-chip) design has become the mainstream. NoC (Network on Chip, Network on Chip) is used to realize the on-chip interconnection of various devices in the SOC. It mainly includes multiple Network Interface Units (NIUs) and Router Units (RUs), such as figure 1 As shown, the NIU is at the boundary of the NoC, and each NIU is used to connect a mounted device and is responsible for managing all requests issued by the device and all requests sent to the device. For each request sent by the device, the NIU records the relevant information and forwards it to the RU....

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/3206G06F1/324G06F15/78G06F15/173
CPCG06F1/3206G06F1/324G06F15/7807G06F15/173Y02D10/00
Inventor 徐祥俊黄维韩胜
Owner HYGON INFORMATION TECH CO LTD
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