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Redundancy flight management computer synchronous debugging method based on ARINC659 bus

A debugging method and computer technology, applied in computing, software testing/debugging, instruments, etc., can solve problems such as flight tube computer channel removal, flight tube system collapse, disasters, etc., and achieve the effect of guaranteeing ground integration and comprehensive testing

Pending Publication Date: 2021-03-23
CHENGDU AIRCRAFT DESIGN INST OF AVIATION IND CORP OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

During the development and debugging process of the airborne software of the flight tube computer, it is necessary to ensure the synchronous operation and stop of the channels of the redundant flight tube computer. Cut off, which may lead to the collapse of the flight tube system, with catastrophic consequences

Method used

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  • Redundancy flight management computer synchronous debugging method based on ARINC659 bus
  • Redundancy flight management computer synchronous debugging method based on ARINC659 bus
  • Redundancy flight management computer synchronous debugging method based on ARINC659 bus

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Embodiment

[0023] The technical scheme of synchronous debugging equipment based on redundancy computer of ARINC659 backplane bus Taking the three-channel (three-redundancy) flight tube computer based on ARINC659 backplane bus as an example, the three channels A / B / C is on the ARINC659 bus, and the communication protocol is defined as RS422 (baud rate 115200bps) and two discrete control signals (reset signal and stop signal) during hardware design. In the design of the hardware scheme, a PC is installed with a control card PCI7250 based on a standard PCI slot and a multi-serial card MOXA CP114, which are used to transmit discrete control signals and RS422 serial communication signals with the flight tube computer respectively.

[0024] Take the PPC755 model CPU as an example, according to its manual, the CPU responds to external interrupts in a low-level trigger mode. Therefore, the synchronous stop signal is designed to be connected to the SMI interface (non-shielded interrupt) on each c...

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Abstract

The invention relates to a redundancy flight management computer synchronous debugging method based on an ARINC659 bus. The method is characterized in that a special synchronous debugging device is constructed to debug redundancy flight management computer airborne software based on the ARINC659 bus, and redundancy channels of a redundancy flight management computer are mutually independent and synchronous in operation, a real-time task is scheduled according to a time triggering protocol of a unified clock, and there is no independent clock; in the development and debugging process of airborne software of the redundancy flight management computer, synchronous operation and stop among redundancy channels must be guaranteed. The technology is already applied to the research and developmentprocess of flight management systems of multiple unmanned aerial vehicle models, and a good effect is achieved. Meanwhile, the technology can also be universally applied to the fields of other redundancy computers using ARINC659 backplane buses.

Description

technical field [0001] The invention belongs to design technology related to redundancy flight management computer and embedded system. Background technique [0002] The ARINC659 bus specification is a specification standard for digital data transmission between field-replaceable modules in a comprehensive modular avionics cabinet. The ARINC659 bus improves reliability through the minimum logic and the minimum number of buses, and improves fault tolerance through extremely high fault detection coverage and fault redundancy. ARINC659 is one of the most well-known time-triggered protocols. The time-triggered protocol ensures the certainty of the system and greatly improves the stability, testability and functional verification of the system; the time-triggered protocol has a global clock, and each communication event , Calculation events are all pre-defined in the static table, the clock synchronization is realized through the protocol, it has time determinism, does not need ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/36G06F13/32
CPCG06F11/3648G06F13/32
Inventor 严增锐周彦税小芳饶晓张兵刘虹呈
Owner CHENGDU AIRCRAFT DESIGN INST OF AVIATION IND CORP OF CHINA
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