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Method and system for data interaction between cpu and fpga suitable for narrowband channel unit

A narrowband channel and data interaction technology, applied in the direction of electrical digital data processing, advanced technology, instruments, etc., can solve the problems that cannot meet the narrowband channel communication system, redundancy, etc., to save transmission bandwidth, ensure real-time performance, and improve reliability Sexual Transmission Effects

Active Publication Date: 2022-07-05
上海微波技术研究所(中国电子科技集团公司第五十研究所)
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Most of the traditional multi-channel transmission protocols are based on the IP protocol. Since it is mainly aimed at broadband channels, this protocol has a lot of redundancy and cannot meet the needs of narrowband channel communication systems.

Method used

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  • Method and system for data interaction between cpu and fpga suitable for narrowband channel unit
  • Method and system for data interaction between cpu and fpga suitable for narrowband channel unit
  • Method and system for data interaction between cpu and fpga suitable for narrowband channel unit

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Effect test

Embodiment 1

[0055] The invention provides a method for data interaction between CPU and FPGA. The method is suitable for a narrowband channel unit of a communication control device. The method includes the following steps:

[0056] Step 1: On the CPU side, use the SPI interface of the CPU to configure the data transmission and reception on the processor side through the underlying driver, and set the SPI interface on the CPU side as the master side;

[0057] Step 2: On the FPGA side, complete data transmission and reception by writing the SPI interface module, and set the SPI interface on the FPGA side as the slave side;

[0058] Step 3: formulate the SPI data packet protocol, the data interaction is in data packets, the master sends the data packets actively, and the slave sends the data packets by interrupting;

[0059] Step 4: formulate the channel processing flow, according to the narrowband channel type, to ensure the real-time performance of the voice and the reliability of the data...

Embodiment 2

[0074] The CPU model used in the implementation of this example is Loongson 1B, and the FPGA model is Huawei HWD2V6000. The actual connection diagram is as follows figure 1 As shown, connect the four pin lines of the SPI interface of the Loongson 1B processor to the four common IO pins of the FPGA, where ss is the chip select pin, sck is the clock pin, and mosi is the master output and slave input. Data pin, miso is the master input and slave output data pin; in addition, connect an external interrupt pin of Loongson 1B to an ordinary IO pin of FPGA.

Embodiment approach

[0075] figure 2 An implementation method of the present invention is shown, and the method specifically includes the following steps:

[0076] step 1:

[0077] Configure the SPI interface of Loongson 1B. According to the content of Loongson 1B manual, set the d4 of the SPCR register to 1, so that the SPI interface is set as the master; configure the d3 and d2 bits of the SPCR register to 11, so that the clock polarity and phase of the SPI interface are set to cpol=1, cpha =1 mode; configure the d1 and d0 bits of the SPCR register and the d1 and d0 bits of the SPER register as 00 and 01, and set the frequency division factor of the SPI interface to 8, because the source clock of frequency division is half of DDR_CLK (125Mhz) , the clock frequency sck of the SPI in the example is 15.625Mhz.

[0078] Configure the external interrupt of Loongson 1B. According to the content of the Loongson 1B manual, set the external interrupt enable used to be valid, and set the interrupt tr...

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Abstract

The present invention provides a CPU and FPGA data interaction method and system suitable for a narrowband channel unit, including: Step 1: on the CPU side, use the SPI interface of the CPU to configure the processor to send and receive data through the underlying driver, and transfer the data on the CPU side to The SPI interface is set as the master side; Step 2: On the FPGA side, complete the data transmission and reception by writing the SPI interface program, and set the SPI interface on the FPGA side as the slave side; Step 3: Formulate the SPI data packet protocol, and the data interaction is in data packets. The master sends the data packets actively, and the slave sends the data packets by interrupting; Step 4: formulate the channel processing flow, and ensure the real-time voice and data reliability according to the narrowband channel type. The present invention fully considers the characteristics of narrowband channels, and makes special processing for channel type and channel transmission content, which can ensure the real-time performance of voice and reliability of data.

Description

technical field [0001] The present invention relates to the technical field of narrowband communication systems, and in particular, to a method and system for data interaction between a CPU and an FPGA suitable for a narrowband channel unit. Background technique [0002] The narrow-band communication system includes narrow-band communication control equipment and various narrow-band channel equipment (such as ultra-short wave radio, short wave radio, flow, scattering, transmission, etc.). Narrowband communication control equipment is a special router, which mainly provides routing, switching and forwarding functions for various channel equipment. The narrowband channel unit is one of the core boards of the communication control device, which is responsible for processing the channel interconnection interface and data transmission services with the narrowband channel device. The narrowband channel unit has multiple channel interfaces, including asynchronous serial port, K ​​...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F13/42G06F13/20G06F9/4401
CPCG06F13/4282G06F13/20G06F9/4411Y02D30/70
Inventor 季锦杰周峰沈乙鸥
Owner 上海微波技术研究所(中国电子科技集团公司第五十研究所)
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