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Cell structure for generating security key, resistive random access memory and method

A technology of resistive variable memory and security key, which is applied to the encryption device with shift register/memory and key distribution, which can solve the problems that the password information is easy to be obtained by external attacks, and the device maintains the characteristics of the device and reads the interference.

Active Publication Date: 2021-03-30
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] When traditional RRAM is used as a PUF application, data is mostly read by comparing the resistance value difference of two RRAM devices, but this method is easily affected by device retention characteristics or device read interference, and because information is directly stored in In the resistance value of the array, the password information is easily obtained by external attacks

Method used

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  • Cell structure for generating security key, resistive random access memory and method
  • Cell structure for generating security key, resistive random access memory and method
  • Cell structure for generating security key, resistive random access memory and method

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Embodiment Construction

[0036]The present disclosure provides a unit structure, a resistive variable memory and a method for generating a security key, using the setting process of two parallel RRAM units connected in series with a capacitor to generate random numbers and random number sequences, and the generated random numbers or random numbers Sequences can be used to implement physical unclonable functions, which in turn can be used in hardware security applications, avoiding the problem that stored data is vulnerable to attacks caused by storing random numbers in the form of resistance.

[0037] In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the present disclosure will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings. In this disclosure, "first input signal", "second input signal", "third input signal" and "fourth input signal" are for the convenience of describing the...

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PUM

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Abstract

The invention discloses a unit structure for generating a security key, a resistive random access memory and a method. The unit structure comprises a parallel structure and a capacitor. The parallel structure includes a first RRAM cell and a second RRAM cell connected in parallel. The input end of the parallel structure is used for accessing an input signal. The capacitor is connected in series with the output end of the parallel structure and is grounded, wherein the setting voltages of the first RRAM unit and the second RRAM unit are different. According to the invention, the random number can be generated by using the setting process of the two parallel RRAM units connected in series with the capacitor, and the generated random number or random number sequence can be used for realizinga physical unclonable function and further used as a security key for hardware security, so that the problem that stored data is easy to attack due to the fact that the random number is stored in a resistance form is avoided.

Description

technical field [0001] The disclosure belongs to the technical field of semiconductor devices and integrated circuits, and relates to a unit structure for generating a security key, a resistive memory and a method. Background technique [0002] Resistive RAM (RRAM) has natural and random fluctuations among RRAM devices due to its own conduction mechanism using conductive filaments. This natural and random variability between devices enables RRAM to be used to implement reliable Physical Unclonable Functions (PUFs) for hardware security applications. [0003] When traditional RRAM is used as a PUF application, data is mostly read by comparing the resistance value difference of two RRAM devices, but this method is easily affected by device retention characteristics or device read interference, and because information is directly stored in In the resistance value of the array, the password information is easily obtained by external attacks. Contents of the invention [0004...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L9/08H04L9/06H01L45/00
CPCH04L9/08H04L9/06H10N70/20
Inventor 康晋锋张逸舟田明刘晓彦黄鹏
Owner PEKING UNIV
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