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Semiconductor structure and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., to achieve the effects of avoiding adverse effects, improving production yield, and improving warpage changes

Active Publication Date: 2021-06-25
CHINA RESOURCES MICROELECTRONICS (CHONGQING) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a semiconductor structure and its manufacturing method, which is used to solve the problem of wafer in the prior art. Problems with various degrees of warpage during mid-process

Method used

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  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof

Examples

Experimental program
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Embodiment 1

[0063] A method for fabricating a semiconductor structure is provided in this embodiment, please refer to figure 1 , shown as a process flow diagram of the method, comprising the following steps:

[0064] A wafer is provided, the wafer includes a front side for forming a semiconductor device and a back side relative to the front side, the wafer has a first degree of warpage, and a doped polysilicon layer is grown on the back side of the wafer;

[0065] The doped polysilicon layer is removed, so that the wafer has a second degree of warpage, and the second degree of warpage is smaller than the first degree of warpage.

[0066] See first figure 2 , performing step S1: providing a wafer 1, the wafer 1 has a first degree of warpage, and the backside of the wafer 1 is provided with a doped polysilicon layer 3.

[0067] As an example, in the direction away from the back side of the wafer 1, the back side of the wafer 1 is provided with a first silicon dioxide layer 2, the doped p...

Embodiment 2

[0075] This embodiment adopts basically the same technical solution as Embodiment 1, the difference is that in this embodiment, after removing the doped polysilicon layer, a silicon dioxide layer is further formed on the back of the wafer, so that the wafer There is a third degree of warpage, the third degree of warpage being less than the second degree of warpage.

[0076] See first Figure 2 to Figure 4 , performing steps S1-S2 that are basically the same as those in Embodiment 1.

[0077] see again Figure 5 and Figure 6 , further forming a silicon dioxide layer on the back surface of the wafer 1 .

[0078] Specifically, since the chemical vapor phase method cannot form a silicon dioxide layer on the back of the wafer, in this embodiment, a furnace tube heating method is used to form a front silicon dioxide layer 5 and a back silicon dioxide layer 5 on the front and back sides of the wafer 1, respectively. Layer 6 (eg Figure 5 shown), and remove the front silicon dio...

Embodiment 3

[0083] In this embodiment, a semiconductor structure is provided, and the manufacturing method of the semiconductor structure as described in the first embodiment is adopted in the manufacturing process of the semiconductor structure.

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Abstract

The invention provides a semiconductor structure and a manufacturing method thereof. The manufacturing method comprises the following steps that: a wafer is provided, the wafer comprises a front surface used for forming a semiconductor device and a back surface opposite to the front surface, a doped polycrystalline silicon layer is grown on the back surface of the wafer, and the wafer has a first warping degree; and the doped polycrystalline silicon layer is removed, so that the wafer has a second warping degree, and the second warping degree is smaller than the first warping degree. According to the semiconductor structure and manufacturing method thereof of the invention, the polycrystalline silicon film layer on the back surface of the wafer is reduced, so that the warping degree change in the stretching direction of the wafer can be improved; in addition, after the polycrystalline silicon film layer on the back face of the wafer is removed, the silicon dioxide layer is further formed on the back face of the wafer; under the condition that the total thickness of the wafer is not increased or even reduced, the warping degree change of the wafer in the stretching direction can be further improved, and adverse effects caused by increase of the thickness of the wafer are avoided. The wafer warping degree is improved, so that the subsequent process can be carried out smoothly, and the production yield can be improved.

Description

technical field [0001] The invention belongs to the field of semiconductor integrated circuit manufacturing, and relates to a semiconductor structure and a manufacturing method thereof. Background technique [0002] During the wafer manufacturing process, different wafer sizes, various wafer manufacturing processes, and the interaction of the stresses of various film layers will cause the wafer to exhibit various degrees of warpage during the intermediate process. [0003] The problem of warpage will affect the machine or process: for example, the wafer cannot be grasped, scratches occur during the process of grasping the wafer, and various abnormalities occur in the process (poor focus of the yellow light process, poor uniformity of the etching process, and occurrence of water tank processes) laminations, etc.). [0004] The factors affecting the warpage of the wafer are in the process of research, but the current research direction is mainly on the film layer and pattern ...

Claims

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Application Information

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IPC IPC(8): H01L21/02
CPCH01L21/02035
Inventor 曹兴旺杜丽黄盛境
Owner CHINA RESOURCES MICROELECTRONICS (CHONGQING) CO LTD
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