Gate circuit and digital circuit including same

Abstract

The invention discloses a gate circuit and a digital circuit comprising the same. The gate circuit comprises a first group of transistors, a second group of transistors and a third transistor which are positioned between a power supply end and a grounding end, wherein the grid electrode of the third transistor receives a clock signal, and the grid electrodes of the transistors in the first group of transistors and the second group of transistors are connected to the input end of the gate circuit so as to receive respective input signals; under the condition that the third transistor is conducted, the first group of transistors are connected to a power supply end, the second group of transistors are connected to a grounding end, and the first group of transistors and the second group of transistors are connected with each other; an intermediate node of the two is connected to the output end of the gate circuit so as to provide a trigger signal corresponding to a logic operation result; and in the transition stage of the input signal, the third transistor is switched off to cut off a direct-current path between the power supply end and the grounding end. Furthermore, according to the digital circuit, a gate circuit and a trigger are used as a combined circuit module for optimization design, so that the circuit cost is reduced.

Description

technical field [0001] The present invention relates to integrated circuit technology, and more particularly, to gate circuits and digital circuits containing gate circuits. Background technique [0002] In the digital part of the integrated circuit, gate circuits are used to implement basic logic operations or complex logic operations, and flip-flops are used to store the logic operation results of the gate circuits as data corresponding to one of two logic states, ie, 0 or 1. According to different logic operations, gate circuits can be divided into AND gates, OR gates, NOT gates, NAND gates, NOR gates, AND-NOR gates, XOR gates, etc. The logic operation result of the gate circuit is, for example, a pulse signal, and the flip-flop generates a steady-state level signal corresponding to a logic state based on the pulse signal. [0003] The gate circuit includes, for example, a PMOS transistor and an NMOS transistor connected in series between a power supply terminal and a gr...

AI Technical Summary

Problems solved by technology

Since the waveform of the input signal is not an ideal step signal, both the PMOS transistor and the NMOS transistor may be in the on state during the rising and falling of the input signal, thus forming a DC path between the power supply end and the ground end, resulting in a switch Short circuit power dissipation during

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