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Successive approximation analog-to-digital converter based on charge injection compensation

A technology of analog-to-digital converter and charge injection, which is applied in analog-to-digital conversion, code conversion, instruments, etc., can solve problems that are difficult to predict and compensate, and achieve the effect of reducing noise and improving signal-to-noise ratio

Active Publication Date: 2021-07-23
3PEAK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] However, in high-precision analog-to-digital converters, the nonlinearity introduced by the bottom plate switch injection is often not negligible, and then due to the amount of error introduced by the switch injection and the size of the switch, the equivalent impedance on both sides of the switch, process parameters and manufacturing Mismatch and many other factors are related, so it is difficult to predict and compensate

Method used

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  • Successive approximation analog-to-digital converter based on charge injection compensation
  • Successive approximation analog-to-digital converter based on charge injection compensation
  • Successive approximation analog-to-digital converter based on charge injection compensation

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Embodiment Construction

[0039] The present invention will be described in detail below in conjunction with various embodiments shown in the drawings. However, these embodiments do not limit the present invention, and structural, method, or functional changes made by those skilled in the art according to these embodiments are included in the protection scope of the present invention.

[0040] ginseng figure 2 Shown, the successive approximation analog-to-digital converter based on charge injection compensation among the present invention, it comprises:

[0041] A comparator (COMP) 10 includes a first input terminal (-), a second input terminal (+) and an output terminal, and a bottom plate switch S is arranged between the first input terminal and the second input terminal w_bottom ;

[0042] The sample and hold unit 20 includes a first capacitor array CDAC_main connected to the first input terminal of the comparator and a first switch array S_main connected to the first capacitor array CDAC_main, t...

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Abstract

The invention discloses a successive approximation analog-to-digital converter based on charge injection compensation, and the analog-to-digital converter comprises a comparator which comprises a first input end, a second input end and an output end, and a bottom plate switch is arranged between the first input end and the second input end; the sampling and holding unit comprises a first capacitor array connected with the first input end of the comparator and a first switch array connected with the first capacitor array; the charge compensation unit comprises a second capacitor array connected with the first input end of the comparator and a second switch array connected with the second capacitor array, and the charge compensation unit is used for counteracting charge injection of the bottom plate switch; and the control logic unit is used for generating a first control logic for controlling the first switch array and a second control logic for controlling the second switch array according to a successive approximation control algorithm. According to the SAR ADC, the charge compensation unit is added on the basis of an existing SAR ADC, and charge injection introduced by a bottom plate switch under any switch configuration can be compensated.

Description

technical field [0001] The invention belongs to the technical field of analog-to-digital converters, in particular to a successive approximation analog-to-digital converter based on charge injection compensation. Background technique [0002] Basic Successive Approximation Analog-to-Digital Converter (SAR ADC) Parameters figure 1 shown. The device performs conversions on command. To handle AC signals, the SAR ADC must have an input sample-and-hold (SHA) function to hold the signal constant during the conversion cycle. [0003] During the conversion cycle, the sample-and-hold (SHA) circuit is placed in hold mode, and the internal DAC is set to midscale. The comparator determines whether the SHA output is greater or less than the DAC output and stores the result (Bit 1, the most significant bit of the conversion) in a successive approximation register (SAR). Then, the DAC is set to 1 / 4 range or 3 / 4 range (depending on the value of bit 1), while the comparator determ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/38
CPCH03M1/38
Inventor 曹骁飞
Owner 3PEAK INC