Test method, test device and storage medium for power failure protection of storage device

Abstract

The invention discloses a test method, a test device and a storage medium for power-down protection of a storage device. The method includes: acquiring a preset test process and test information; optimizing the preset test process based on the test information to obtain An optimized test process; acquiring preset test parameters, optimizing the preset test parameters to obtain optimized test parameters; executing the optimized test process based on the optimized test parameters. By improving the traditional power-down test method, on the one hand, the invalid test links and non-essential test links in the existing power-down test process are identified and the existing power-down test process is optimized, thereby effectively reducing the power-down test. The time consumption of the process; on the other hand, the test parameters in the power-down test process are optimized to further reduce the time consumption in each power-down test process, thereby greatly reducing the time consumption in the entire power-down test process and improving Power-down test efficiency.

Description

technical field [0001] The present invention relates to the technical field of memory testing, in particular to a test method for power-down protection of a storage device, a test device for power-down protection of a storage device, and a computer-readable storage medium. Background technique [0002] Non-volatile memory is a physical device necessary for the chip to realize its functions. It is used to store important information and assets such as various files, keys, transaction logs, application data and even program codes. The stability of the data information it carries And reliability is very important for the normal use of the whole chip. [0003] During the use of the chip, due to complex changes in the use environment, various accidents may cause power outages, virtual connections, etc., and the chip is running at this time, so it will inevitably encounter major impacts, especially for non- Volatile memory will lead to situations such as data loss and memory dama...

AI Technical Summary

Problems solved by technology

However, in the actual application process, on the one hand, with the continuous development of technology, the low-interval test time interval will lead to the continuous increase of test time; on the other hand, due to the large number of test links, the time required for each test link There are many, so the existing test process takes a long time and the test efficiency is low, which has caused great troubles for technicians

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