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Isomerism hybrid multi-core chip architecture for realizing electric power data processing.

A technology for real-time processing of power data, applied in the power grid field, can solve the problems of lack of heterogeneous computing units, lack of security considerations for multi-service data fusion on the edge side, low power data processing efficiency and security on the edge side of the power grid, etc. The effect of efficiency

Inactive Publication Date: 2021-08-24
CHINA SOUTHERN POWER GRID DIGITAL GRID RES INST CO LTD
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Existing edge-side computing chips generally adopt the SMP homogeneous multi-core architecture, lacking heterogeneous computing units oriented to the computing needs of power grid business application scenarios, chip performance and computing modes are difficult to meet the growing edge computing performance requirements, and lacking edge-side multi-service data fusion It is difficult to adapt to the development trend of power grid digitization due to security considerations
[0003] In the current power data processing, there is a lack of a homogeneous / heterogeneous hybrid multi-core chip architecture that integrates real-time, safe, and intelligent multi-computing capabilities and is suitable for a variety of power edge computing application scenarios, resulting in power data processing efficiency and security at the edge of the power grid. lower sex

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  • Isomerism hybrid multi-core chip architecture for realizing electric power data processing.
  • Isomerism hybrid multi-core chip architecture for realizing electric power data processing.
  • Isomerism hybrid multi-core chip architecture for realizing electric power data processing.

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Embodiment Construction

[0039] In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

[0040] In one embodiment, such as figure 1 As shown, a homogeneous hybrid multi-core chip architecture for realizing power data processing is provided. In this embodiment, the system is applied to a terminal for illustration. It can be understood that the system can also be applied to a server. In this embodiment, the system includes a homogeneous main control unit and a heterogeneous data processing unit, wherein:

[0041] The isomorphic main control unit obtains power data and generates control instructions corresponding to power business requirements by responding to b...

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Abstract

The invention relates to an isomerism hybrid multi-core chip architecture for realizing electric power data processing. The architecture comprises an isomorphic main control unit and a heterogeneous data processing unit, wherein the heterogeneous data processing unit comprises data processing subunits required by different power business requirements; the isomorphic main control unit obtains power data and generates a control instruction corresponding to a power business demand by responding to a business processing request carrying the power business demand; and a target data processing subunit in the heterogeneous data processing unit processes the power data by responding to a control instruction sent by the isomorphic main control unit. By adopting the system, the power data processing efficiency and safety of the power grid edge side can be improved.

Description

technical field [0001] The present application relates to the technical field of power grids, in particular to a homogeneous hybrid multi-core chip architecture for realizing power data processing and a method for power data processing. Background technique [0002] With the development of digital grid technology, edge computing has become a new node that carries grid services and data. A large amount of data is aggregated and fused at the edge, and multi-services are coordinated and processed locally at the edge. Different from the traditional edge side deployment method, the digital grid edge side generally does not form new physical nodes, and is integrated with existing devices. Highly concurrent applications and diverse data processing requirements require edge side core chips to have high performance and high security. , low power consumption and other features to meet the key needs of real-time response, data security, and intelligent processing. Existing edge-side c...

Claims

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Application Information

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IPC IPC(8): G06F15/167G06F15/173G06Q50/06
CPCG06F15/167G06F15/173G06Q50/06Y04S10/50Y02E40/70
Inventor 李鹏李立浧习伟黄凯姚浩陈军健蒋小文陶伟邓清唐于杨
Owner CHINA SOUTHERN POWER GRID DIGITAL GRID RES INST CO LTD