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Semiconductor power device

A technology of power devices and semiconductors, which is applied in the field of semiconductor power devices including multi-layer n-type drift regions, and can solve problems such as difficult simultaneous adjustment of on-resistance and breakdown voltage

Pending Publication Date: 2021-08-24
SUZHOU ORIENTAL SEMICONDUCTOR CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] In view of this, the object of the present invention is to provide a semiconductor power device to solve the problem that the on-resistance and breakdown voltage of the semiconductor power device in the prior art are difficult to adjust simultaneously

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  • Semiconductor power device
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Embodiment Construction

[0023] The technical solution of the present invention will be fully described below in a specific manner with reference to the accompanying drawings in the embodiments of the present invention. Apparently, the described embodiments are some, not all, embodiments of the present invention. It should be understood that terms such as "having", "comprising" and "including" used herein do not denote the presence or addition of one or more other elements or combinations thereof. At the same time, in order to clearly illustrate the specific implementation of the present invention, the schematic diagrams listed in the accompanying drawings of the specification magnify the thickness of the layers and regions described in the present invention, and the listed figures do not represent the actual size.

[0024] figure 1 It is a schematic cross-sectional structure diagram of the first embodiment of a semiconductor power device provided by the present invention, figure 2 It is a schemati...

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Abstract

The invention belongs to the technical field of semiconductor power devices, and particularly discloses a semiconductor power device. The semiconductor power device comprises an n-type epitaxial layer, and a first n-type drift region, a second n-type drift region and a third n-type drift region which are positioned in the n-type epitaxial layer from bottom to top, wherein the doping concentration of the first n-type drift region and the doping concentration of the third n-type drift region are both greater than the doping concentration of the second n-type drift region; at least one gate trench and a gate structure located in the gate trench, wherein the bottom of the gate trench is not higher than the upper surface of the second n-type drift region; and p-type body regions which are located on the two sides of the gate groove and located on the third n-type drift region, wherein the n-type source regions are located in the p-type body regions. The breakdown voltage of the semiconductor power device can be improved, and the on-resistance of the semiconductor power device can be reduced.

Description

technical field [0001] The invention belongs to the technical field of semiconductor power devices, in particular to a semiconductor power device including multilayer n-type drift regions. Background technique [0002] Semiconductor power devices in the prior art usually form trenches in the epitaxial layer through deep trench technology, and form a vertical RESURF (Reduced Surface Field) structure by filling the trench with a dielectric layer and a polysilicon shield gate, Therefore, the breakdown voltage and on-resistance performance of semiconductor power devices are improved. The on-resistance of semiconductor power devices can be reduced by increasing the doping concentration of the epitaxial layer, but the increase of the doping concentration of the epitaxial layer will make it difficult to deplete the charge at the bottom of the trench, and the electric field at the bottom of the trench is relatively concentrated , so that semiconductor power devices cannot obtain a ...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/06H01L29/36H01L29/423H01L27/088
CPCH01L29/0611H01L29/0684H01L29/36H01L29/4236H01L29/7827H01L29/7831H01L27/088H01L29/423H01L29/78H01L29/06H01L29/739
Inventor 龚轶刘磊刘伟毛振东
Owner SUZHOU ORIENTAL SEMICONDUCTOR CO LTD