TFT substrate and manufacturing method thereof
A manufacturing method and substrate technology, applied in semiconductor/solid-state device manufacturing, optics, instruments, etc., can solve problems such as Fogmura generation, and achieve the effect of reducing flow channels
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Embodiment 1
[0061] Please refer to figure 1 , Embodiment 1 of the present invention is:
[0062] Please refer to figure 1 , a TFT substrate, comprising a glass substrate 1, on one side of the glass substrate 1, a gate metal layer 2, a gate insulating layer 3, an active layer 4, an etching stopper layer 5, a source and drain are sequentially stacked Metal layer 6, passivation layer 7, buffer layer 8, first insulating layer 9, common electrode layer 10 and second insulating layer 11, the first via hole is opened on the said etching barrier layer 5, and said first via hole A source-drain metal layer 6 is filled in the middle, a second via hole is opened on the passivation layer 7, a third via hole is opened on the first insulating layer 9, and a first via hole is opened on the second insulating layer 11. Four via holes, the second via hole, the third via hole and the fourth via hole are sequentially stacked and communicated, and the second via hole, the third via hole and the fourth via ho...
Embodiment 2
[0080] Please refer to figure 2 , the second embodiment of the present invention is:
[0081] A method for manufacturing a TFT substrate, comprising the steps of:
[0082] S1. Provide a glass substrate 1, the surface of the glass substrate 1 is covered with a gate metal layer 2;
[0083] S2, forming a gate insulating layer 3 and covering the surface of the gate metal layer 2;
[0084] S3, forming an active layer 4 and covering the surface of the gate insulating layer 3;
[0085] S4, forming an etching barrier layer 5, and covering the surface of the active layer 4; forming a first via hole in the etching barrier layer 5;
[0086] S5, forming the source-drain metal layer 6, and covering the surface of the etching barrier layer 5 and filling in the first via hole;
[0087] S6, forming a passivation layer 7 and covering the surface of the source-drain metal layer 6; forming a second via hole in the passivation layer 7;
[0088] S7, forming a buffer layer 8, and covering the...
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