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Crack detecting and monitoring system for an integrated circuit

A technology of integrated circuits, cracks, applied in the direction of circuits, measuring electricity, measuring devices, etc.

Pending Publication Date: 2021-10-12
GLOBALFOUNDRIES U S INC MALTA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, such crack detection structures are inherently flawed because they are designed to detect cracks at too late a time, and after the crack has already reached the working area of ​​the IC chip

Method used

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  • Crack detecting and monitoring system for an integrated circuit
  • Crack detecting and monitoring system for an integrated circuit
  • Crack detecting and monitoring system for an integrated circuit

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Embodiment Construction

[0027] In the following description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific exemplary embodiments in which the present teachings may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the teachings, and it is to be understood that other embodiments may be utilized and changes may be made without departing from the scope of the teachings. Accordingly, the following description is illustrative only.

[0028] figure 1 Shown is a plan view of an integrated circuit (IC) 102 comprising a crack detection and monitoring system 100 for detecting and monitoring the growth of cracks according to an embodiment. The IC 102 is formed on a semiconductor substrate 104 (e.g., a silicon wafer) and includes an inner core (referred to below as the active region 106) surrounded by and passing through the guard ring 110 and at least one crack stop s...

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Abstract

Embodiments of the disclosure provide a system for detecting and monitoring a crack in an integrated circuit (IC), including: at least one electrically conductive perimeter line (PLINE) extending about, and electrically isolated from, a protective structure formed in an inactive region of the IC, wherein an active region of the IC is enclosed within the protective structure; a circuit for sensing a change in an electrical characteristic of the at least one PLINE, the change in the electrical characteristic indicating a presence of a crack in the inactive region of the IC; and a connecting structure for electrically coupling each PLINE to the sensing circuit.

Description

technical field [0001] The present disclosure relates to integrated circuits, and more particularly to systems for detecting and monitoring crack growth in integrated circuits (ICs). Background technique [0002] Processes such as wafer dicing can lead to the formation and propagation of cracks in ICs. Such cracks typically form at the interface between the dielectric material and the metal lines / contacts in the IC. [0003] ICs are often exposed to harsh, hostile and stressful environments (eg, automotive, aerospace, military, etc.). Fluctuations in environmental conditions (eg, changes in temperature, humidity, and air pressure) can exacerbate and activate slow crack growth mechanisms on both nascent and quiescent cracks (eg, cracks formed during wafer dicing) in ICs. Continuous fluctuations in environmental conditions can enhance the growth of nascent and quiescent cracks over time, potentially leading to IC failure. [0004] Crackstops (eg, interconnect structures of ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/544H01L21/66
CPCH01L22/34H01L22/14H01L22/12G01R31/2884G01R31/2881G01R31/2858
Inventor 尼可拉斯·A·帕罗莫夫D·布罗伊尔E·D·亨特-施罗德B·J·文德尔D·许
Owner GLOBALFOUNDRIES U S INC MALTA