Semiconductor structure and semiconductor layout structure

Abstract

The invention discloses a semiconductor structure and a semiconductor layout structure. The semiconductor layout structure includes a substrate, a plurality of gate structures, and a plurality of conductive structures. The substrate includes a plurality of active regions extending along a first direction, in which the active regions are separated from each other by an isolation structure. The gate structures extend across the active regions along a second direction that is perpendicular to the first direction, in which each of the active regions includes a pair of source / drain portions at opposite sides of each of the gate structures. The conductive structures are embedded in a first portion of the isolation structure disposed between the adjacent active regions in the first direction, wherein the conductive structures extend along the second direction and are separated from the source / drain portions by the isolation structure. Therefore, the semiconductor layout structure provided by the invention can reduce the size of a unit cell, thereby achieving high device density.

Description

technical field [0001] The invention relates to a semiconductor structure and a semiconductor layout structure. More particularly, the present invention relates to semiconductor structures and semiconductor layout structures having antifuse structures. Background technique [0002] Fuse elements are commonly used in semiconductor devices, such as semiconductor memory or logic devices. Antifuses have the opposite electrical characteristics of fuses, and a defective unit can be repaired by replacing it with a redundant unit. [0003] Typically, an antifuse needs to be controlled by a control gate adjacent to it. Therefore, a memory cell (unit cell) is defined as 1T1C, representing a transistor (gate) and a capacitor (antifuse). However, when the number of antifuse increases, the traditional 1T1C structure will occupy a large area. In order to achieve high density memory cells or redundancy, memory cells should be as small as possible. Contents of the invention [0004] ...

AI Technical Summary

Problems solved by technology

However, when the number of antifuse increases, the traditional 1T1C structure will occupy a large area

Images