A kind of SRAM reading and writing control method and row buffer controller

Abstract

The present invention is applicable to the technical field of SOC, and provides a kind of SRAM reading and writing control method and row buffer controller, and described method comprises: setting access field and reading and writing strategy in strategy register; SRAM read and write addresses, and send data read and write instructions according to the SRAM read and write addresses; adjust the row replacement strategy according to the data read and write instructions through the row buffer register group, and read or / and write data according to the row replacement strategy operate. The invention reduces the dynamic power consumption generated in the process of reading and writing the SRAM through a new line buffer controller.

Description

technical field [0001] The invention belongs to the technical field of SOC, and in particular relates to an SRAM read-write control method and a row buffer controller. Background technique [0002] In a low-power embedded system-on-chip (System On Chip, SOC), read and write access operations of a static random-access memory (Static Random-Access Memory, SRAM) will cause relatively large dynamic power consumption. Please refer to figure 1 , in related research, the latest scheme on memory access power consumption control is to use the spatial locality and temporal locality of memory access to read row data in Dynamic Random Access Memory (DRAM) access Temporarily stored in a row buffer Cache (Row Buffer Cache) for specially caching row data, and the row buffer Cache, row buffer interference detector (Row buffer interference detector), row buffer locality predictor (Row buffer locality predictor), Fairness allocator and other related circuits are integrated into the memory c...

AI Technical Summary

Problems solved by technology

[0004] The embodiment of the present invention provides a SRAM read and write control method and a row buffer controller, aiming to solve the problem of high dynamic power consumption when the row buffer controller in the prior art performs reading and writing

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