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Method for realizing digital circuit load separation through automatic cloning

A digital circuit and automatic technology, applied in the direction of electrical digital data processing, CAD circuit design, special data processing applications, etc., can solve the problems of difficult realization of complex circuits, difficulty of load separation, difficulty of verification, etc., to achieve high flexibility, Reusable and highly reliable effects

Active Publication Date: 2021-11-16
上海芷锐电子科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Aiming at the deficiencies in the prior art, the present invention provides a method for automatic cloning to realize load separation of digital circuits, so as to solve the problems that the traditional ECO method is difficult to realize load separation, has low reliability, is difficult to verify, and is difficult to implement in complex circuits

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  • Method for realizing digital circuit load separation through automatic cloning
  • Method for realizing digital circuit load separation through automatic cloning
  • Method for realizing digital circuit load separation through automatic cloning

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Embodiment Construction

[0025] The present invention is described in further detail now in conjunction with accompanying drawing.

[0026] Such as figure 1 As shown, a method for automatic cloning to realize load separation of digital circuits includes the following steps: the start register of the circuit to be cloned is the source unit and the end register is the load unit, and the EDA tool is used to automatically complete the separation of the specified circuit load and automatically analyze The circuit topology and connection relationship can automatically write ECO scripts and environmental constraints. The advantages are fast ECO, high reliability of results, and high pass rate of formal verification. Strong coupling, thereby improving the reusability of IP design. It includes the following steps: According to the configuration requirements, obtain the source unit and its load unit that need to separate the load, and then obtain the circuit structure of the source unit and its fan-out unit th...

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Abstract

The invention discloses a method for realizing digital circuit load separation through automatic cloning. The method comprises the following steps: 1, specifying a source unit and a load which are required to be copied; 2, deriving a circuit topology structure of the source unit; 3, by a filtering unit, using a recursive algorithm to remove units which are not on the paths of the source unit and the load unit, and obtaining a circuit structure required to be copied; 4, by a copy unit, copying the filtered unit; 5, disconnecting an original circuit, and then reconnecting the load unit and the copy circuit in the previous step; 6, circulating the units of the copy circuit; and 7, by an output unit, describing the processes from the step 4 to the step 6, and outputting a formal verification constraint file and an environment setting file required by the copy circuit at the same time. According to the method for realizing digital circuit load separation through automatic cloning, load separation can be automatically completed in the circuit realization process, and the method has the advantages of being high in reliability, simple in realization process and free of iteration.

Description

technical field [0001] The invention discloses a chip technology field. Background technique [0002] In the physical implementation of the chip, synthesis, layout and routing often encounter the problem of timing non-convergence caused by high fan-out or different loads due to excessive physical distance. In order to solve this problem, the usual practice is to complete the load separation by modifying the RTL design in the early stage of logic design. The strategy is to copy the original circuit to obtain several circuits with the same function, and connect them to the original load in a distributed manner. The disadvantage of removing the strong coupling caused by different loads is that dynamic function verification needs to be re-performed. If the original code needs to be modified due to design problems, the copied code also needs to be modified synchronously; and the design needs to be highly related to the actual physical implementation, which also affects The reusa...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/32G06F30/327
CPCG06F30/32G06F30/327Y02D10/00
Inventor 郭希训于威刘圆殷晓康袁肖华徐峰
Owner 上海芷锐电子科技有限公司