Forming method of shallow trench isolation structure and manufacturing method of flash memory
A technology of isolation structure and shallow trench, which is applied in semiconductor/solid-state device manufacturing, electric solid-state devices, semiconductor devices, etc., can solve problems such as defect holes, achieve the effect of reducing consumption and solving the problem of defect holes
Pending Publication Date: 2021-11-30
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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[0004] The object of the present invention is to provide a method for forming a shallow trench isolation structure and a method for manufacturing a flash memory, so as to solve the problem of defect holes caused by the above-mentioned impurities
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[0025] In order to make the purpose, advantages and features of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in very simplified form and not drawn to scale, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention. In addition, the structures shown in the drawings are often a part of the actual structures. In particular, each drawing needs to display different emphases, and sometimes uses different scales.
[0026] As used in the present invention, the singular forms "a", "an" and "the" include plural objects, the term "or" is usually used in the sense of including "and / or", and the term "several" Usually, the term "at least one" is used in the meaning of "at least one", and the term "at least two" is usually used in the meaning of "two or more". In ...
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Abstract
The invention provides a forming method of a shallow trench isolation structure and a manufacturing method of a flash memory. The forming method of the shallow trench isolation structure comprises the steps: providing a substrate, forming trenches in the substrate, and covering the substrate between the trenches with a first dielectric layer; forming a first field oxide layer, filling the groove with the first field oxide layer, and extending to cover the first dielectric layer; performing first chemical mechanical polishing on the first field oxide layer by taking the first dielectric layer as a polishing stop layer; forming a second field oxide layer, and performing second chemical mechanical polishing on the second field oxide layer by taking the first dielectric layer as a polishing stop layer; and removing the first dielectric layer on the surface of the substrate to form a shallow trench isolation structure. According to the invention, the first field oxide layer is covered by the second field oxide layer, so that defect holes possibly existing after the first field oxide layer is subjected to the first chemical mechanical polishing can be filled, and the problem of the defect holes can be solved; and the consumption of the first dielectric layer is reduced by utilizing the high selection ratio of the second chemical mechanical polishing.
Description
technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a shallow trench isolation structure and a method for manufacturing a flash memory. Background technique [0002] As the size of semiconductor devices continues to decrease, the size of isolation regions between devices also decreases accordingly. At present, STI (shallow trench isolation, shallow trench isolation structure) is mostly used to realize the isolation between devices. [0003] Among them, the formation process of the shallow trench isolation structure of the flash memory is as follows Figure 1a and 1b As shown, the surface of the substrate 10' is covered with a patterned (opening) dielectric layer 11', and a trench 12' is formed using the dielectric layer 11' as a mask, and the field oxygen layer 21' fills the trench 12', And extend to cover the dielectric layer 11'. However, in the process of forming the field oxygen layer 21', since ...
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Login to View More IPC IPC(8): H01L21/762H01L27/11548H01L27/11575
CPCH01L21/76224H10B41/50H10B43/50
Inventor 梁肖孙琪郭国超田守卫
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP