Self-aligned back-cut SDB FinFET device and manufacturing method thereof

Abstract

The invention provides a self-aligned back-cut SDB FinFET device and a manufacturing method thereof. The manufacturing method comprises the following steps: forming a plurality of Fin structures which are longitudinally arranged on a substrate; arranging a thin-layer oxide on the Fin structure; transversely arranging the plurality of metal gates on the Fin structure; enabling the metal gate to be composed of a high-K dielectric material and a side wall attached to the side wall of the high-K dielectric material; forming a SiGe region and a SiP region on two adjacent Fin structures; forming an SDB groove in the Fin structure between the SiGe region and the SiP region; forming a thin oxide layer on the inner wall of the SDB groove; filling the SDB groove with silicon nitride; filling the silicon nitride in the SDB groove with silicon oxide; and filling an ILD layer between the metal gates. According to the invention, the growth of SiGe and SiP is not affected so that the quality of the SiGe region and the SiP region is higher; the SDB groove adopts a self-alignment process so that the process change can be effectively controlled; the SDB groove is filled with silicon nitride so that the stress of SiGe and SiP is not easy to lose; and meanwhile, the SDB groove is filled with a dielectric layer so that the interaction between the metal gate and the SiGe and SiP is eliminated.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a self-aligned back-cut SDB FinFET device and a manufacturing method thereof. Background technique [0002] Logic designs in standard cells are created using standard cells. The height of the cell is the number of tracks multiplied by the metal pitch (Pitch), and the track and pitch are measured with metal layer 2 (M2). figure 1 Shown as a schematic diagram of a 7.5 rail unit, half of the height of the power supply (Power) and the ground rail (Ground) are located in the upper unit and the lower unit, respectively. [0003] The cell width is related to the contact poly pitch (CPP), and the number of CPPs that make up the cell width depends on the cell type and whether the cell has a double diffusion break (DDB) or a single diffusion break (SDB). [0004] A DDB adds one and a half CPPs on each side of the cell. For actual cells, such as NAND gates and cell scan flip-flops...

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Problems solved by technology

[0006] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a self-aligned back-cut SDBFinFET device and its manufacturing method, which is used to solve the problem of excessive Fin loss during the FCVD annealing process in the manufacture of FinFET devices in the prior art. The problem

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