Semiconductor structure and forming method of semiconductor structure

Abstract

The invention discloses a semiconductor structure and a forming method of the semiconductor structure. The method comprises the steps: providing a substrate, wherein the substrate comprises an isolation region and is provided with a plurality of fin parts which are separated from one another; forming a first dielectric structure on the substrate and the surfaces of the fin parts, wherein a plurality of gate openings crossing the fins parts are formed in the first dielectric structure, and cross the isolation region; forming a gate structure in each gate opening; removing the gate structure on the isolation region, and forming first openings penetrating through the gate structure in the first dielectric structure on the isolation region; removing at least part of the first dielectric structure between the adjacent first openings, and forming second openings communicated with the first openings between the adjacent first openings, wherein the first openings and the second openings form partition openings; and forming a strained layer at least within the partition opening. According to the invention, the performance and the reliability of the semiconductor structure are improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a method for forming the semiconductor structure. Background technique [0002] In the field of semiconductor technology, with the continuous reduction of the feature size of integrated circuits and the requirement for higher signal transmission speed of integrated circuits, transistors need to have higher driving current while gradually reducing their size. [0003] In order to make the semiconductor device have a higher driving current while the size is gradually reduced, generally, the structure of the fin field effect transistor is adopted. Since the fin field effect transistor is a similar three-dimensional structure located on the substrate, its feature size is smaller, which can better meet the requirements of high integration. Moreover, the gate of the fin field effect transistor is opposite to the upper surface of the fin, and the...

AI Technical Summary

Problems solved by technology

[0004] However, the performance and reliability of semiconductor devices still need to be improved

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