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Memory device, data processing system and method and storage medium

A memory system and memory technology, applied in the field of memory, can solve the problems of reducing seek time, waiting time delay, etc.

Pending Publication Date: 2022-02-25
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, SSDs may have reduced seek times, latency, or other delays associated with disk drives (e.g., electromechanical, etc.)

Method used

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  • Memory device, data processing system and method and storage medium
  • Memory device, data processing system and method and storage medium
  • Memory device, data processing system and method and storage medium

Examples

Experimental program
Comparison scheme
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example 1

[0141] Example 1 is a memory device comprising: a memory array of a plurality of memory cells, a plurality of word lines, a plurality of bit lines, and control circuitry coupled to the plurality of word lines and the plurality of bit lines; wherein,

[0142] The control circuit is configured to: determine a selected word line from the plurality of word lines in response to a first write command; determine a selected bit line from the plurality of bit lines; Determining a selected first physical address with the selected word line; writing information associated with the first L2P pointer to the first physical address;

[0143]Wherein, the first physical address is a physical address corresponding to the first physical area; the first physical area is an L2P management table maintained by the controller of the memory system, and the first identification information is a certain Among the multiple physical areas indicated by the first element, the physical area indicated by a se...

example 4

[0147] Example 4 is a data processing system, including: a memory system and a host device;

[0148] The memory system includes a memory device and a controller, wherein the memory device stores a logical-to-physical L2P table;

[0149] The controller is programmed to perform the following operations, including:

[0150] Maintaining an L2P management table; wherein, the L2P management table is configured to include a first-level management sub-table and a second-level management sub-table; the first-level management sub-table includes a plurality of first elements; each of the first elements corresponds to A secondary management subtable; the first element is configured to include first identification information; the first identification information is used to indicate the usage status of multiple physical areas in the memory system; the secondary management subtable Each included second element is configured to include second identification information; the second identific...

example 13

[0175] Example 13 is a data processing method applied to a data processing system comprising a memory system and a host device, the memory system comprising a memory device and a controller, wherein the memory device stores a logical-to-physical L2P table, the Methods include:

[0176] The L2P management table is maintained by the controller; wherein, the L2P management table is configured to include a first-level management sub-table and a second-level management sub-table; the first-level management sub-table includes a plurality of first elements; each of the The first element corresponds to a secondary management subtable; the first element is configured to include first identification information; the first identification information is used to indicate the usage status of multiple physical areas in the memory system; the Each second element included in the secondary management sub-table is configured to include second identification information; the second identification...

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PUM

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Abstract

The invention discloses a memory device, a data processing system and method, and a storage medium. A controller in a memory system is programmed to execute the following operations: an L2P management table is maintained; the L2P management table is configured to comprise a first-level management sub-table and a second-level management sub-table; the first-level management sub-table comprises a plurality of first elements; each first element corresponds to one second-level management sub-table; each first element is configured to contain first identification information; each second element contained in the secondary management sub-table is configured to contain second identification information; a physical area indicated by the second elements with second identification information of a second mark is obtained from a plurality of physical areas indicated by the first elements with first identification information of a first mark by using the L2P management table after responding to a request for an L2P pointer sent from a host device; and information associated with the first L2P pointer is stored using the physical area indicated by a certain second element of the second mark.

Description

technical field [0001] The present invention relates to the technical field of memory, in particular to a memory device, a data processing system, a method, and a storage medium. Background technique [0002] Memory systems are typically provided as internal semiconductor integrated circuits in computers or other electronic devices. There are many different types of memory, including volatile and nonvolatile memory. Volatile memory requires power to maintain its data and includes Random Access Memory (RAM, Random Access Memory), Dynamic Random Access Memory (DRAM, Dynamic Random Access Memory) or Synchronous Dynamic Random Access Memory (SDRAM, Synchronous Dynamic Random Access Memory) and so on. Non-volatile memory can retain stored data when it is not powered on, and includes Flash Memory (Flash Memory), Read Only Memory (ROM, Read Only Memory), Electrically Erasable Programmable ROM (EEPROM, Electrically Erasable Programmable Read- Only Memory), static RAM (SRAM, Stati...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/24G06F12/02
CPCG11C16/24G06F12/0223
Inventor 尹茂君杨垒
Owner YANGTZE MEMORY TECH CO LTD
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