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Chip local coating device

A coating device and partial technology, applied in the field of chip analysis and processing equipment, can solve irreparable problems

Pending Publication Date: 2022-03-18
BEIJING CHIP IDENTIFICATION TECH CO LTD +2
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, once the chip encounters a wrong layer in the process of de-layering, it is almost completely irreparable in the case of the prior art.

Method used

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  • Chip local coating device
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  • Chip local coating device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0033] In one embodiment of the present invention, a chip local coating device is provided, such as Figure 1-Figure 3 As shown, the device includes: a cabinet 1, a coating device, an object stage 102 and a microscope 2, one side of the cabinet 1 is provided with a coating operation port, and the coating device includes a coating probe 101, the The coating device is installed inside the cabinet 1, and the coating probe 101 protrudes from the coating operation port to the outside of the cabinet 1, and the microscope 2 and the stage 102 are fixedly installed On the cabinet 1 , the stage 102 is located below the coating operation port, and the microscope 2 is located above the coating operation port.

[0034] In this embodiment, the coating device further includes a peristaltic pump 103 and a silicone grease storage tank 104;

[0035] The silicone grease storage tank 104 communicates with the feed port of the peristaltic pump 103 through the silicone grease transfer tube 105 , a...

Embodiment 2

[0052] In one embodiment of the present invention, a chip local coating device is provided, such as Figure 1-Figure 2 As shown, the device includes: a cabinet 1, a coating device, an object stage 102 and a microscope 2, one side of the cabinet 1 is provided with a coating operation port, and the coating device includes a coating probe 101, the The coating device is installed inside the cabinet 1, and the coating probe 101 protrudes from the coating operation port to the outside of the cabinet 1, and the microscope 2 and the stage 102 are fixedly installed On the cabinet 1 , the stage 102 is located below the coating operation port, and the microscope 2 is located above the coating operation port.

[0053] In this embodiment, the coating device also includes a peristaltic pump 103 and a silicone grease storage tank 104; the silicone grease storage tank 104 communicates with the feed port of the peristaltic pump 103 through a silicone grease delivery pipe 105, and the peristalt...

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Abstract

The embodiment of the invention provides a chip local coating device, and belongs to the technical field of chip analysis and processing equipment.The device comprises a case, a coating device, an objective table and a microscope, a coating operation opening is formed in one side of the case, the coating device comprises a coating probe, the coating device is installed in the case, and the objective table is connected with the coating probe. A coating operation opening is formed in the machine box, the coating probe extends out of the machine box from the coating operation opening, the microscope and the objective table are fixedly installed on the machine box on the upper side and the lower side of the coating operation opening, the objective table is located below the coating operation opening, and the microscope is located above the coating operation opening. The method comprises the following steps of: coating a covering material on the pothole or the part with less layer number of the chip by using a coating device, and forming a protective film on the pothole or the part with less layer number of the chip by using the shielding property and the adhesion of the covering material, so that only the part with more layer number is subjected to layer removal in the dry etching and wet etching layer removal process, and the chip is positioned on the same layer.

Description

technical field [0001] The invention relates to the technical field of chip analysis and processing equipment, in particular to a chip partial coating device. Background technique [0002] The chip is mainly composed of the device layer plus various metal layers and dielectric layers. Chip delayer analysis and analysis are mainly used in chip failure analysis and reverse engineering. Chip delayer analysis mainly includes passivation layer / insulation layer removal, aluminum wire / Copper wire removal, barrier layer removal, dielectric layer etching and other specific technical means, among which the layer removal technology needs to completely remove the insulation layer between the metal wire and the metal wire layer by layer, and properly expose the next layer of metal wire, sometimes It is also necessary to preserve the via hole (Via hole) between the metal lines, or remove the adhesion layer, which is a challenging technique in failure analysis. During the chip de-layerin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/67G02B21/26G02B21/24G02B21/06
CPCH01L21/6715G02B21/26G02B21/24G02B21/06
Inventor 赵东艳王于波单书珊陈燕宁董广智钟明琛宋彦斌吴峰霞刘春颖鹿祥宾刘波
Owner BEIJING CHIP IDENTIFICATION TECH CO LTD