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Ultrasonic bonding wire bonding machine and semiconductor device packaging method and structure

A technology of ultrasonic bonding and device packaging, applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical solid-state devices, etc., can solve problems such as lead fatigue failure, thermal deformation of lead bonds, device performance degradation, etc., to avoid fatigue Failure, not easy to break, the effect of improving device reliability

Pending Publication Date: 2022-03-25
上海功成半导体科技有限公司
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  • Summary
  • Abstract
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  • Claims
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Problems solved by technology

[0004] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide an ultrasonic bonding wire machine, semiconductor device packaging method and structure, which is used to solve the problem of placing chips at intervals on the same horizontal plane for wire bonding in the prior art. When the packaged chip is in use, thermal deformation will occur at the wire bonding due to temperature rise. Repeated temperature changes will eventually lead to lead fatigue failure, resulting in degradation of device performance or even complete failure.

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  • Ultrasonic bonding wire bonding machine and semiconductor device packaging method and structure
  • Ultrasonic bonding wire bonding machine and semiconductor device packaging method and structure
  • Ultrasonic bonding wire bonding machine and semiconductor device packaging method and structure

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Embodiment Construction

[0032] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention. For example, when describing the embodiments of the present invention in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged according to the general scale, and the schematic diagram is only an example, which should not limit the protection scope of the present invention. In addition, the three-dimensional space dimensions of length, width and depth should be in...

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Abstract

The invention provides an ultrasonic bonding wire bonding machine and a semiconductor device packaging method and structure. The packaging method comprises the following steps: placing a first chip and a second chip in parallel up and down at an interval, and enabling a first welding spot of the first chip to correspond to a second welding spot of the second chip up and down; placing a metal lead with a preset length in lead channels at two ends of an ultrasonic bonding wire bonding machine, and vertically placing the metal lead between the first chip and the second chip; and ultrasonically bonding two ends of the metal lead to the first welding spot of the first chip and the second welding spot of the second chip respectively. According to the invention, the chip is designed to be in an up-and-down opposite layout, the metal leads are subjected to ultrasonic bonding in the direction perpendicular to the surface of the chip, through the design, even if thermal stress is generated by temperature change, shear stress in the cross section direction of the leads does not occur, and the bonding positions of the leads are not easy to break; fatigue failure caused by repeated thermal stress of the lead can be effectively avoided, and the reliability of the device can be improved.

Description

technical field [0001] The invention relates to the technical field of packaging, in particular to an ultrasonic bonding wire bonding machine, a semiconductor device packaging method and structure. Background technique [0002] Wire bonding (Wire Bonding) is a package that uses thin metal wires and uses heat, pressure, and ultrasonic energy to tightly weld the metal leads and substrate pads to achieve electrical interconnection between chips and substrates and information exchange between chips. technology. Under ideally controlled conditions, electron sharing or interdiffusion of atoms occurs between the lead and the substrate, enabling atomic-scale bonding between the two metals. [0003] The existing wire bonding process is usually to place two chips at intervals on the same horizontal plane, firstly solder the first end of the wire to the wire bonding position A of the first chip 11, and then pull the wire at the end of the wire bonding machine. Move to the second chip...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/67H01L21/60
CPCH01L21/67138H01L24/78H01L2021/60007
Inventor 李静薇王鹏
Owner 上海功成半导体科技有限公司
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