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Method, system, device and equipment for testing integrity of I2C (Inter-Integrated Circuit) signal

A technology of signal integrity and testing methods, which is applied in the detection of faulty computer hardware, etc., can solve problems such as low testing efficiency, and achieve the effects of improving testing efficiency, reducing work pressure, and improving the level of automation

Pending Publication Date: 2022-04-05
SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] It can be seen that the current I2C signal quality test process requires a lot of manual participation. Under the background of testing many I2C links, not only the test efficiency is extremely low, but also brings heavy work to the testers.

Method used

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  • Method, system, device and equipment for testing integrity of I2C (Inter-Integrated Circuit) signal
  • Method, system, device and equipment for testing integrity of I2C (Inter-Integrated Circuit) signal
  • Method, system, device and equipment for testing integrity of I2C (Inter-Integrated Circuit) signal

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0045] figure 1 A flow chart of a method for testing I2C signal integrity provided by an embodiment of the present application; figure 2 A timing diagram of a standard I2C protocol and a schematic diagram of waveform parameters provided in the embodiment of the present application.

[0046] Such as figure 1As shown, based on the test host, the I2C signal integrity test method provided by the embodiment of the present application includes:

[0047] S101: pre-controlling the oscilloscope connected to the test host to be in a trigger mode in which the trigger source is a clock signal.

[0048] S102: After determining that the I2C link to be tested on the motherboard under test transmits the I2C signal to be tested, read the test waveform obtained by the oscilloscope from the clock signal test point of the I2C link to be tested and the data signal test point of the I2C link to be tested and Waveform parameters for the test waveform.

[0049] S103: Analyze the waveform paramet...

Embodiment 2

[0067] On the basis of the above-described embodiments, in order to further improve the automation level of the I2C signal quality test, in the method for testing the I2C signal integrity provided by the embodiment of the present application, the test host and the two ends of the I2C link to be tested on the main board to be tested are Master and slave connections.

[0068] Then, in the method for testing the integrity of the I2C signal provided by the embodiment of the present application, in step S102, it is determined that the I2C link to be tested on the motherboard under test transmits the I2C signal to be tested, specifically:

[0069] After using the serial port tool to control the master device to send I2C read and write commands to the slave device of the I2C link to be tested, determine that the I2C link to be tested transmits the I2C signal to be tested.

[0070] In the specific implementation, the script that controls the master device to send I2C read and write in...

Embodiment 3

[0074] image 3 It is a schematic structural diagram of an I2C signal integrity testing system provided in an embodiment of the present application.

[0075] Such as image 3 As shown, the I2C signal integrity test system provided by the embodiment of the present application includes a test host 301 and an oscilloscope 302 connected to the test host 301;

[0076] Wherein, the test host 301 is used to pre-control the oscilloscope 302 to be in the trigger mode in which the trigger source is a clock signal; The test waveform and the waveform parameters of the test waveform obtained by the clock signal test point and the data signal test point of the I2C link to be tested; analyze the waveform parameters to obtain the test result of the I2C link to be tested, and generate the I2C to be tested according to the test result and test waveform Waveform test report.

[0077]Since the embodiments of the system part correspond to the embodiments of the method part, please refer to the ...

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Abstract

The invention discloses an I2C signal integrity test method, system, device and equipment and a computer readable storage medium, based on a test host connected with an oscilloscope, the oscilloscope is controlled in advance to be in a trigger mode with a trigger source being a clock signal; when it is determined that the to-be-tested I2C link of the tested mainboard transmits the to-be-tested I2C signal, reading a test waveform obtained by an oscilloscope from a clock signal test point of the to-be-tested I2C link and a data signal test point of the to-be-tested I2C link and waveform parameters of the test waveform; the waveform parameters are analyzed to obtain a test result of the to-be-tested I2C link, a test report of the to-be-tested I2C waveform is generated according to the test result and the test waveform, an automatic test tool is operated through a test host to automatically configure an oscilloscope, the test waveform and the waveform parameters are read from the oscilloscope, the automation level of the I2C signal quality test process is greatly improved, and the test efficiency is improved. The working pressure of testers is reduced, and the testing efficiency is improved.

Description

technical field [0001] The present application relates to the technical field of server testing, in particular to a testing method, system, device, equipment and computer-readable storage medium for I2C signal integrity. Background technique [0002] I2C (Inter-Integrated Circuit, two-wire serial bus) communication is the most common device communication protocol, only need two signal lines of clock signal (SCL) and data signal (SDA) to realize the master (Master) device For temperature detection, in-position detection, parameter modification and other operations of slave (Slave) devices, in addition, since each slave device has an independent device ID, one master device can control multiple slave devices, so I2C communication is widely used. [0003] On a device with many peripheral devices such as a server or a memory, there are many I2C links, and it is a heavy task to test the I2C signal quality. [0004] Existing I2C signal quality testing method mainly comprises: aft...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22
Inventor 郭建超
Owner SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD